Fine-grained timed software in Simulink models

This paper considers a refinement of standard Software-in-the-Loop (SiL) testing called Fine-grained Timed SiL, in short FiTS, where execution of code fragments is interleaved with simulation of execution time consumption on appropriate virtual processor models. The interleaving takes place at accesses to inputs and outputs of the software component. We present here various FiTS implementations in Simulink, and explore avenues for virtual platform modeling with FiTS in Simulink. The paper also presents a use case for unit testing in model-based development of automotive controller software, where the software under test is code-generated from an upgraded version of a legacy Simulink model. Here, execution time simulation in FiTS at code fragment level has been instrumental in revealing a problem with the original model upgrade process. The issue is not visible in the original upgraded Simulink model or in its corresponding standard SiL, or in other SiL variants that consider execution times only at the software function level. This demonstrates the applicability of the FiTS approach as a general SiL testing method without the need for detailed platform models and accurate execution time estimates.