LSFQ:一种用于高性能fpga CNN加速的低精度全整数量化方法

Zhenshan Bao, Kang Zhan, Wenbo Zhang, Junnan Guo
{"title":"LSFQ:一种用于高性能fpga CNN加速的低精度全整数量化方法","authors":"Zhenshan Bao, Kang Zhan, Wenbo Zhang, Junnan Guo","doi":"10.1109/COOLCHIPS52128.2021.9410327","DOIUrl":null,"url":null,"abstract":"Neural network quantization has become an important research area. Deep networks run with low precision operations at inference time offer power and space advantages over high precision alternatives, and can maintain high accuracy. However, few quantization can demonstrate this advantage on hardware platform, because the design of quantization algorithm lacks the consideration of actual hardware implementation. In this paper, we propose an efficient quantization method for hardware implementation, a learnable parameter soft clipping fully integer quantization (LSFQ), which includes weight quantization and activation quantization with learnable clipping parameter method. The quantization parameters are optimized automatically by back propagation to minimize the loss, then the BatchNorm layer and convolutional layer are fused, and the bias and quantization step size are further quantized. In this way, LSFQ accomplishes integer-only-arithmetic. We evaluate the quantization algorithm on a variety of models including VGG7, mobile-net v2 in CIFAR10 and CIFAR100. The results show that when the quantization reaches 3-bit or 4-bit, the accuracy loss of our method is less than 1 % compared with the full-precision network. In addition, we design an accelerator for the quantization algorithm and deploy it to the FPGA platform to verify the hardware-awareness of our method.","PeriodicalId":103337,"journal":{"name":"2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"LSFQ: A Low Precision Full Integer Quantization for High-Performance FPGA-Based CNN Acceleration\",\"authors\":\"Zhenshan Bao, Kang Zhan, Wenbo Zhang, Junnan Guo\",\"doi\":\"10.1109/COOLCHIPS52128.2021.9410327\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Neural network quantization has become an important research area. Deep networks run with low precision operations at inference time offer power and space advantages over high precision alternatives, and can maintain high accuracy. However, few quantization can demonstrate this advantage on hardware platform, because the design of quantization algorithm lacks the consideration of actual hardware implementation. In this paper, we propose an efficient quantization method for hardware implementation, a learnable parameter soft clipping fully integer quantization (LSFQ), which includes weight quantization and activation quantization with learnable clipping parameter method. The quantization parameters are optimized automatically by back propagation to minimize the loss, then the BatchNorm layer and convolutional layer are fused, and the bias and quantization step size are further quantized. In this way, LSFQ accomplishes integer-only-arithmetic. We evaluate the quantization algorithm on a variety of models including VGG7, mobile-net v2 in CIFAR10 and CIFAR100. The results show that when the quantization reaches 3-bit or 4-bit, the accuracy loss of our method is less than 1 % compared with the full-precision network. In addition, we design an accelerator for the quantization algorithm and deploy it to the FPGA platform to verify the hardware-awareness of our method.\",\"PeriodicalId\":103337,\"journal\":{\"name\":\"2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/COOLCHIPS52128.2021.9410327\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COOLCHIPS52128.2021.9410327","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

摘要

神经网络量化已成为一个重要的研究领域。与高精度替代方案相比,深度网络在推理时间以低精度操作运行,具有功率和空间优势,并且可以保持高精度。然而,很少有量化能在硬件平台上体现这一优势,因为量化算法的设计缺乏对实际硬件实现的考虑。本文提出了一种硬件实现的有效量化方法——可学习参数软裁剪全整数量化(LSFQ),包括权量化和可学习裁剪参数激活量化。通过反向传播自动优化量化参数,使损失最小化,然后融合BatchNorm层和卷积层,进一步量化偏置和量化步长。通过这种方式,LSFQ实现了整数算术。我们在CIFAR10和CIFAR100中的VGG7、mobile-net v2等多种模型上对量化算法进行了评估。结果表明,当量化达到3位或4位时,与全精度网络相比,该方法的精度损失小于1%。此外,我们为量化算法设计了一个加速器,并将其部署到FPGA平台上,以验证我们的方法的硬件感知性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
LSFQ: A Low Precision Full Integer Quantization for High-Performance FPGA-Based CNN Acceleration
Neural network quantization has become an important research area. Deep networks run with low precision operations at inference time offer power and space advantages over high precision alternatives, and can maintain high accuracy. However, few quantization can demonstrate this advantage on hardware platform, because the design of quantization algorithm lacks the consideration of actual hardware implementation. In this paper, we propose an efficient quantization method for hardware implementation, a learnable parameter soft clipping fully integer quantization (LSFQ), which includes weight quantization and activation quantization with learnable clipping parameter method. The quantization parameters are optimized automatically by back propagation to minimize the loss, then the BatchNorm layer and convolutional layer are fused, and the bias and quantization step size are further quantized. In this way, LSFQ accomplishes integer-only-arithmetic. We evaluate the quantization algorithm on a variety of models including VGG7, mobile-net v2 in CIFAR10 and CIFAR100. The results show that when the quantization reaches 3-bit or 4-bit, the accuracy loss of our method is less than 1 % compared with the full-precision network. In addition, we design an accelerator for the quantization algorithm and deploy it to the FPGA platform to verify the hardware-awareness of our method.
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