{"title":"基于当前复用拓扑的双频CMOS LNA设计","authors":"M. Ben Amor, A. Fakhfakh, H. Mnif, M. Loulou","doi":"10.1080/00207210701827863","DOIUrl":null,"url":null,"abstract":"A new architecture of dual band receiver was introduced; it is able to make simultaneous operations at two different frequency bands. This architecture uses a new dual band low noise amplifier (LNA). A novel high gain and low noise amplifier topology is proposed. This paper presents a general methodology to design a LNA with current reuse topology for the two standards GSM and UMTS at 947.5MHz and 2.14GHz frequencies respectively, A fully integrated dual band LNA was designed using 0.35mum CMOS process. At 947.5MHz, the LNA exhibits a noise figure of 2.3dB, a voltage gain of 28dB, a CP1 of -12dBm. However, the LNA at 2.14GHz features a noise figure of 2.71dB, a voltage gain of 17dB and a CP1 of -4.5dBm. The power consumption is 37.5mW under a power supply voltage of 2.5V","PeriodicalId":399250,"journal":{"name":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"36","resultStr":"{\"title\":\"Dual band CMOS LNA design with current reuse topology\",\"authors\":\"M. Ben Amor, A. Fakhfakh, H. Mnif, M. Loulou\",\"doi\":\"10.1080/00207210701827863\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new architecture of dual band receiver was introduced; it is able to make simultaneous operations at two different frequency bands. This architecture uses a new dual band low noise amplifier (LNA). A novel high gain and low noise amplifier topology is proposed. This paper presents a general methodology to design a LNA with current reuse topology for the two standards GSM and UMTS at 947.5MHz and 2.14GHz frequencies respectively, A fully integrated dual band LNA was designed using 0.35mum CMOS process. At 947.5MHz, the LNA exhibits a noise figure of 2.3dB, a voltage gain of 28dB, a CP1 of -12dBm. However, the LNA at 2.14GHz features a noise figure of 2.71dB, a voltage gain of 17dB and a CP1 of -4.5dBm. The power consumption is 37.5mW under a power supply voltage of 2.5V\",\"PeriodicalId\":399250,\"journal\":{\"name\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"36\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1080/00207210701827863\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1080/00207210701827863","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 36
摘要
介绍了一种新的双频接收机结构;它能够在两个不同的频段同时进行操作。该架构采用了一种新型双频低噪声放大器(LNA)。提出了一种新的高增益低噪声放大器拓扑结构。本文提出了一种针对GSM和UMTS两种标准(分别为947.5MHz和2.14GHz)的当前复用拓扑设计LNA的一般方法,采用0.35 μ m CMOS工艺设计了一种完全集成的双频LNA。在947.5MHz时,LNA的噪声系数为2.3dB,电压增益为28dB, CP1为-12dBm。然而,2.14GHz的LNA噪声系数为2.71dB,电压增益为17dB, CP1为-4.5dBm。电源电压为2.5V时,功耗为37.5mW
Dual band CMOS LNA design with current reuse topology
A new architecture of dual band receiver was introduced; it is able to make simultaneous operations at two different frequency bands. This architecture uses a new dual band low noise amplifier (LNA). A novel high gain and low noise amplifier topology is proposed. This paper presents a general methodology to design a LNA with current reuse topology for the two standards GSM and UMTS at 947.5MHz and 2.14GHz frequencies respectively, A fully integrated dual band LNA was designed using 0.35mum CMOS process. At 947.5MHz, the LNA exhibits a noise figure of 2.3dB, a voltage gain of 28dB, a CP1 of -12dBm. However, the LNA at 2.14GHz features a noise figure of 2.71dB, a voltage gain of 17dB and a CP1 of -4.5dBm. The power consumption is 37.5mW under a power supply voltage of 2.5V