{"title":"教程:信号/图像处理的数字神经计算","authors":"S. Kung","doi":"10.1109/NNSP.1991.239479","DOIUrl":null,"url":null,"abstract":"The requirements on both the computations and storage for neural networks are extremely demanding. Neural information processing would be practical only when efficient and high-speed computing hardware can be made available. The author reviews several approaches to architecture and implementation of neural networks for signal and image processing. The author discusses direct design of dedicated neural networks implemented by a variety of hardware technologies (e.g. CMOS, CCD), and introduces an indirect design approach based on matrix-based mapping methodology for systolic/wavefront array processor. The array processors mapping technique presented should be applicable to both programmable neurocomputer and dedicated digital or analog neural processing circuits. Several key general-purpose and system-oriented designs are surveyed. Key design examples of existing parallel processing neurocomputers are also discussed.<<ETX>>","PeriodicalId":354832,"journal":{"name":"Neural Networks for Signal Processing Proceedings of the 1991 IEEE Workshop","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Tutorial: digital neurocomputing for signal/image processing\",\"authors\":\"S. Kung\",\"doi\":\"10.1109/NNSP.1991.239479\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The requirements on both the computations and storage for neural networks are extremely demanding. Neural information processing would be practical only when efficient and high-speed computing hardware can be made available. The author reviews several approaches to architecture and implementation of neural networks for signal and image processing. The author discusses direct design of dedicated neural networks implemented by a variety of hardware technologies (e.g. CMOS, CCD), and introduces an indirect design approach based on matrix-based mapping methodology for systolic/wavefront array processor. The array processors mapping technique presented should be applicable to both programmable neurocomputer and dedicated digital or analog neural processing circuits. Several key general-purpose and system-oriented designs are surveyed. Key design examples of existing parallel processing neurocomputers are also discussed.<<ETX>>\",\"PeriodicalId\":354832,\"journal\":{\"name\":\"Neural Networks for Signal Processing Proceedings of the 1991 IEEE Workshop\",\"volume\":\"74 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-09-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Neural Networks for Signal Processing Proceedings of the 1991 IEEE Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NNSP.1991.239479\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Neural Networks for Signal Processing Proceedings of the 1991 IEEE Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NNSP.1991.239479","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Tutorial: digital neurocomputing for signal/image processing
The requirements on both the computations and storage for neural networks are extremely demanding. Neural information processing would be practical only when efficient and high-speed computing hardware can be made available. The author reviews several approaches to architecture and implementation of neural networks for signal and image processing. The author discusses direct design of dedicated neural networks implemented by a variety of hardware technologies (e.g. CMOS, CCD), and introduces an indirect design approach based on matrix-based mapping methodology for systolic/wavefront array processor. The array processors mapping technique presented should be applicable to both programmable neurocomputer and dedicated digital or analog neural processing circuits. Several key general-purpose and system-oriented designs are surveyed. Key design examples of existing parallel processing neurocomputers are also discussed.<>