Kaname Shimada, Takuma Hikida, Hiroki Nishikawa, Ittetsu Taniguchi, H. Tomiyama
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Scheduling of Malleable Tasks with DMA-based Communication
This paper studies scheduling of malleable tasks on multicore architectures. The proposed technique decides the number of cores for each task at the same time as task scheduling. DMA-based inter-task communication is also taken into account during task scheduling.