采用数字驱动无掩膜光刻技术的高密度扇出晶圆级封装和下一代异构集成应用的PI和PBO层光刻工艺优化

2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) Pub Date : 2022-05-01 DOI:10.1109/ectc51906.2022.00239

T. Uhrmann, B. Povazay, T. Zenger, Bemd Thallner, R. Holly, Bozena Matuskova Lednicka, Mario Reybrouck, Niels Van Herck, Bart Persijn, D. Janssen, S. Vanclooster, Stef Heirbaut

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引用次数: 2

摘要

先进封装的更新路线图表明，对更密集的下一代异构集成设计的需求增加了。为了进一步减少目前为FOWLP量身定制的关键介电层的直径，我们使用无掩模曝光光刻系统评估了高性能聚酰亚胺(PI)和聚苯并恶唑(PBO)材料，该系统可以实现即时设计更改。

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Optimization of PI & PBO Layers Lithography Process for High Density Fan-Out Wafer Level Packaging & Next Generation Heterogeneous Integration Applications Employing Digitally Driven Maskless Lithography

The updated roadmap for advanced packaging shows an increased need for denser next-generation heterogeneous integration designs. With the goal of further reducing the currently achieved via diameters in critical dielectric layers tailored for FOWLP, we evaluated high performing polyimide (PI) and polybenzoxazole (PBO) materials using a maskless exposure lithography system that enables instant design changes.

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2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)

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