{"title":"在共火过程中利用厚银带增强LTCC封装中的热扩散","authors":"T. Welker, N. Gutzeit, Jens Müller","doi":"10.23919/EMPC.2017.8346859","DOIUrl":null,"url":null,"abstract":"The integration density in semiconductor devices has significantly increased in the last years. This trend is already described by Moore's law what forecasts a doubling of the integration density every two years. This evolution makes greater demands on the substrate technology which is used for the first level interconnect between the semiconductor and the device package. Higher pattern resolution is required to connect more functions on a smaller chip. Also the thermal performance of the chip carrying substrate is a crucial issue. The increased integration density leads to a higher power density, thus more heat has to dissipate on a smaller area. Thus, substrates with a high thermal conductivity (e. g. direct bonded copper (DBC)) are utilized. However, the reduced pattern resolution caused by thick metal layers is disadvantageous for this substrate technology. Alternatively, low temperature co-fired ceramic (LTCC) can be used. This multilayer technology provides high pattern resolutions in combination with high integration grades. The poor thermal conductivity of LTCC (3 to 5 W/(m-K) requires thermal vias made of silver paste which are placed between the power chip and the heat sink to reduce the thermal resistance of the substrate. The via-pitch and diameter is technologically limited, what allows a maximum filling grade of approx. 20 %. Heat spreading inside LTCC substrates is commonly realized with thick film printed metal layers which connect a smaller via matrix in the upper layer with larger via matrix in the following layer. However the heat spreading capability of these structures is limited due to the relatively low achievable metal layer thickness applying a standard screen printing process. In the presented investigation, a thick silver tape is used to form a thick silver heat spreader inside the LTCC substrate. The substrate consists of 4 layers LTCC DP951. In the top layer 36 silver vias with a diameter of 250 μm and a pitch of 500 μm are placed in a 3 × 3 mm2 substrate area. An opening is structured in the following layer by laser cutting, which is filled with a laser cut silver tape to form a 7 × 7 mm2 heat spreader. In each following layer 196 silver vias with the same pitch and diameter as the vias in the top layer are placed in a 7 × 7 mm2 area. The layers are stacked together, laminated and sintered utilizing a pressure assisted sintering process. The thermal performance of the substrate was investigated by means of simulations and measurements. A package comprising of the LTCC substrate and a thermal test chip was realized to measure the thermal performance. A thermal resistance of 2.6 K/W was evaluated for the package with integrated full metal heat spreader during these measurements. Compared to a package having a standard via structure instead of the introduced silver heat spreader a reduction of 30.5 % of the thermal resistance was achieved. Advantages of the presented heat spreader are achievable low thermal resistances and simple embedding capabilities in the co-fire LTCC process flow.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Enhanced heat spreading in LTCC packages utilizing thick silver tape in the co-fire process\",\"authors\":\"T. Welker, N. Gutzeit, Jens Müller\",\"doi\":\"10.23919/EMPC.2017.8346859\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The integration density in semiconductor devices has significantly increased in the last years. This trend is already described by Moore's law what forecasts a doubling of the integration density every two years. This evolution makes greater demands on the substrate technology which is used for the first level interconnect between the semiconductor and the device package. Higher pattern resolution is required to connect more functions on a smaller chip. Also the thermal performance of the chip carrying substrate is a crucial issue. The increased integration density leads to a higher power density, thus more heat has to dissipate on a smaller area. Thus, substrates with a high thermal conductivity (e. g. direct bonded copper (DBC)) are utilized. However, the reduced pattern resolution caused by thick metal layers is disadvantageous for this substrate technology. Alternatively, low temperature co-fired ceramic (LTCC) can be used. This multilayer technology provides high pattern resolutions in combination with high integration grades. The poor thermal conductivity of LTCC (3 to 5 W/(m-K) requires thermal vias made of silver paste which are placed between the power chip and the heat sink to reduce the thermal resistance of the substrate. The via-pitch and diameter is technologically limited, what allows a maximum filling grade of approx. 20 %. Heat spreading inside LTCC substrates is commonly realized with thick film printed metal layers which connect a smaller via matrix in the upper layer with larger via matrix in the following layer. However the heat spreading capability of these structures is limited due to the relatively low achievable metal layer thickness applying a standard screen printing process. In the presented investigation, a thick silver tape is used to form a thick silver heat spreader inside the LTCC substrate. The substrate consists of 4 layers LTCC DP951. In the top layer 36 silver vias with a diameter of 250 μm and a pitch of 500 μm are placed in a 3 × 3 mm2 substrate area. An opening is structured in the following layer by laser cutting, which is filled with a laser cut silver tape to form a 7 × 7 mm2 heat spreader. In each following layer 196 silver vias with the same pitch and diameter as the vias in the top layer are placed in a 7 × 7 mm2 area. The layers are stacked together, laminated and sintered utilizing a pressure assisted sintering process. The thermal performance of the substrate was investigated by means of simulations and measurements. A package comprising of the LTCC substrate and a thermal test chip was realized to measure the thermal performance. A thermal resistance of 2.6 K/W was evaluated for the package with integrated full metal heat spreader during these measurements. Compared to a package having a standard via structure instead of the introduced silver heat spreader a reduction of 30.5 % of the thermal resistance was achieved. Advantages of the presented heat spreader are achievable low thermal resistances and simple embedding capabilities in the co-fire LTCC process flow.\",\"PeriodicalId\":329807,\"journal\":{\"name\":\"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition\",\"volume\":\"61 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/EMPC.2017.8346859\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EMPC.2017.8346859","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Enhanced heat spreading in LTCC packages utilizing thick silver tape in the co-fire process
The integration density in semiconductor devices has significantly increased in the last years. This trend is already described by Moore's law what forecasts a doubling of the integration density every two years. This evolution makes greater demands on the substrate technology which is used for the first level interconnect between the semiconductor and the device package. Higher pattern resolution is required to connect more functions on a smaller chip. Also the thermal performance of the chip carrying substrate is a crucial issue. The increased integration density leads to a higher power density, thus more heat has to dissipate on a smaller area. Thus, substrates with a high thermal conductivity (e. g. direct bonded copper (DBC)) are utilized. However, the reduced pattern resolution caused by thick metal layers is disadvantageous for this substrate technology. Alternatively, low temperature co-fired ceramic (LTCC) can be used. This multilayer technology provides high pattern resolutions in combination with high integration grades. The poor thermal conductivity of LTCC (3 to 5 W/(m-K) requires thermal vias made of silver paste which are placed between the power chip and the heat sink to reduce the thermal resistance of the substrate. The via-pitch and diameter is technologically limited, what allows a maximum filling grade of approx. 20 %. Heat spreading inside LTCC substrates is commonly realized with thick film printed metal layers which connect a smaller via matrix in the upper layer with larger via matrix in the following layer. However the heat spreading capability of these structures is limited due to the relatively low achievable metal layer thickness applying a standard screen printing process. In the presented investigation, a thick silver tape is used to form a thick silver heat spreader inside the LTCC substrate. The substrate consists of 4 layers LTCC DP951. In the top layer 36 silver vias with a diameter of 250 μm and a pitch of 500 μm are placed in a 3 × 3 mm2 substrate area. An opening is structured in the following layer by laser cutting, which is filled with a laser cut silver tape to form a 7 × 7 mm2 heat spreader. In each following layer 196 silver vias with the same pitch and diameter as the vias in the top layer are placed in a 7 × 7 mm2 area. The layers are stacked together, laminated and sintered utilizing a pressure assisted sintering process. The thermal performance of the substrate was investigated by means of simulations and measurements. A package comprising of the LTCC substrate and a thermal test chip was realized to measure the thermal performance. A thermal resistance of 2.6 K/W was evaluated for the package with integrated full metal heat spreader during these measurements. Compared to a package having a standard via structure instead of the introduced silver heat spreader a reduction of 30.5 % of the thermal resistance was achieved. Advantages of the presented heat spreader are achievable low thermal resistances and simple embedding capabilities in the co-fire LTCC process flow.