采用固定误差模式，降低LDPC的误差层

2010 International Conference on Educational and Information Technology Pub Date : 2010-10-25 DOI:10.1109/ICEIT.2010.5608383

Chen Huang, Liang Zhou, H. Wen, Qian Zhao, Feng Xu

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引用次数: 0

摘要

本文提出了一种高性能、高信息比特率的FEC方案。通过分析一类QC(拟循环)-LDPC码的错误层特性，设计了一种串接码，消除了这种产生固定错误模式的捕获集。仿真结果表明了该方案的有效性。我们估计的误差下限在1e-15以下。该方法可用于100Gp/s的高速通信。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Lower the error floor of LDPC with fixed error pattern

This paper presented a FEC scheme with very high performance and high information bit rate. By analyzing the error-floor characteristics of a family of QC (Quasi-Cyclic)-LDPC codes, we design a concatenated code to eliminate this kind of trapping set which caused fixed error pattern. The simulation results have demonst-rated the performance of the novel scheme is efficient. The error floor that we estimate is below 1e-15. This approach can be used on the high speed 100Gp/s communication.

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2010 International Conference on Educational and Information Technology

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