多通道神经记录与刺激集成电路的可测试性设计

P. Kmon, P. Otfinowski, P. Grybos, R. Szczygiel, M. Zoladz, A. Lisicka
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引用次数: 1

摘要

我们报告设计的100通道集成电路(10×10像素矩阵)注定复杂的神经生物学实验。该芯片致力于记录和刺激神经活动,其主要属性来自其对每个像素的两个块和分配的单独数字控制。此外,集成电路由RAM、ADC、带隙基准、可编程模拟多路复用器和可编程偏置块组成。该芯片采用CMOS 180mn工艺设计,占地5×5 mm2。本文着重对这类芯片进行设计,以便于对其进行测试。介绍了主要的集成电路模块,并给出了初步的测量结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design for the testability of the multichannel neural recording and stimulating integrated circuit
We report on design of the 100 channel integrated circuit (10×10 pixel matrix) destined to complex neurobiology experiments. The chip is dedicated to both recording and stimulating neural activity and its predominant attributes comes from its individual digital control of both blocks and allocation of both in each of the pixel. Additionally, the integrated circuit is composed of RAM, ADC, bandgap reference, programmable analog multiplexer and programmable biasing block. The chip is designed in CMOS 180mn process and occupies 5×5 mm2. The paper focuses on design of these type of chips in order to facilitate its tests. The main IC's blocks are described and its preliminary measurements are shown.
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