{"title":"并行设计环境中的过程/产品交互","authors":"Larry Bair","doi":"10.1109/CICC.2007.4405845","DOIUrl":null,"url":null,"abstract":"The interactions between VLSI processes and the products built in them continue to perplex those who design and those who manufacture semiconductor chips. Predicting, preventing, and minimizing these interactions is compounded by attempts to minimize time-to-market through concurrent process and design development in integrated design and manufacturing environments. Past experience, engineering conservatism, and flexible design techniques enable successful concurrent deep submicron CMOS VLSI designs.","PeriodicalId":130106,"journal":{"name":"2007 IEEE Custom Integrated Circuits Conference","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Process/Product Interactions in a Concurrent Design Environment\",\"authors\":\"Larry Bair\",\"doi\":\"10.1109/CICC.2007.4405845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The interactions between VLSI processes and the products built in them continue to perplex those who design and those who manufacture semiconductor chips. Predicting, preventing, and minimizing these interactions is compounded by attempts to minimize time-to-market through concurrent process and design development in integrated design and manufacturing environments. Past experience, engineering conservatism, and flexible design techniques enable successful concurrent deep submicron CMOS VLSI designs.\",\"PeriodicalId\":130106,\"journal\":{\"name\":\"2007 IEEE Custom Integrated Circuits Conference\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2007.4405845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2007.4405845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Process/Product Interactions in a Concurrent Design Environment
The interactions between VLSI processes and the products built in them continue to perplex those who design and those who manufacture semiconductor chips. Predicting, preventing, and minimizing these interactions is compounded by attempts to minimize time-to-market through concurrent process and design development in integrated design and manufacturing environments. Past experience, engineering conservatism, and flexible design techniques enable successful concurrent deep submicron CMOS VLSI designs.