{"title":"基于核心的ASIC设计的现实:单回路工业过程控制器","authors":"L. Kovács, M. Gaffney","doi":"10.1109/ASIC.1989.123207","DOIUrl":null,"url":null,"abstract":"A description is given of the realities of an implementation of a microprocessor-based design using a standard cell ASIC (application-specific integrated circuit). The entire design process is described from specifications and vendor selection through schematic capture, testability, and simulation. The ASIC design was implemented using the UCS51 family of microcontroller cells. An attempt is made to clarify the problems associated with the beta site nature of the project.<<ETX>>","PeriodicalId":245997,"journal":{"name":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The realities of core based ASIC design: a single-loop industrial process controller\",\"authors\":\"L. Kovács, M. Gaffney\",\"doi\":\"10.1109/ASIC.1989.123207\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A description is given of the realities of an implementation of a microprocessor-based design using a standard cell ASIC (application-specific integrated circuit). The entire design process is described from specifications and vendor selection through schematic capture, testability, and simulation. The ASIC design was implemented using the UCS51 family of microcontroller cells. An attempt is made to clarify the problems associated with the beta site nature of the project.<<ETX>>\",\"PeriodicalId\":245997,\"journal\":{\"name\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1989.123207\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1989.123207","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The realities of core based ASIC design: a single-loop industrial process controller
A description is given of the realities of an implementation of a microprocessor-based design using a standard cell ASIC (application-specific integrated circuit). The entire design process is described from specifications and vendor selection through schematic capture, testability, and simulation. The ASIC design was implemented using the UCS51 family of microcontroller cells. An attempt is made to clarify the problems associated with the beta site nature of the project.<>
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