基于FPGA的边缘计算单镜头检测加速优化

R. Wu, P. Fu, Lei Feng, Shan Sun, Shuyan Wang, Bing Liu
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引用次数: 0

摘要

基于单次检测的深度神经网络(Deep Neural Network, DNN)由于具有单阶段检测和高精度的特点,在边缘计算中得到了广泛的应用。特别是在基于现场可编程门阵列(FPGA)的加速中,SSD能够以更高的效率完成读时目标检测。然而,在严格的场景下,SSD的加速一直受到系统集成、尺寸和功耗的限制。它要求所有的网络推理都在单芯片内完成,并要求在SSD中加速后处理算法。为了在单芯片上实现SSD加速,本文提出了一种针对自主人体检测场景的SSD优化加速方法。通过判断概率阈值对原有的后处理算法进行优化,在不影响检测精度的前提下减少了位置盒的冗余计算操作。同时,构建了满足硬件约束平台的加速体系结构。在实验结果中,优化后的软件执行时间从46.024ms降低到9.277ms,硬件加速时间进一步降低到1.117ms,性能提升7.305倍。该方法也可用于其它加速后处理算法的应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Optimized Acceleration of Single Shot Detection for Edge Computing Based-on FPGA
Single Shot Detection (SSD) based Deep Neural Network (DNN) has been widely used in edge computing due to the properties of one-stage detection and high accuracy. Especially in Field Programmable Gate Array (FPGA) based acceleration, SSD can complete read-time object detection with higher efficiency. However, the acceleration of SSD has been suffered from constraints of system integration, size and power in strict scenarios. It requires all network inference to be done within single chip, as well as the acceleration of post-processing algorithm in SSD. To realize SSD acceleration in single chip, this paper proposes an optimized acceleration method of SSD for autonomous body detection scenario. The original post-processing algorithm is optimized through judging the probability threshold, which reduces the redundant computing operations of location box without losing detection accuracy. Meanwhile, an acceleration architecture is constructed to satisfy hardware constrained platform. In the experimental results, the optimized execution time is changed from 46.024ms to 9.277ms in software, and the accelerated time is further reduced to 1.117ms in hardware, which achieves performance improvement in 7.305 times. The proposed method can also be applied to other applications for the acceleration of post-processing algorithm.
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