R. Wu, P. Fu, Lei Feng, Shan Sun, Shuyan Wang, Bing Liu
{"title":"基于FPGA的边缘计算单镜头检测加速优化","authors":"R. Wu, P. Fu, Lei Feng, Shan Sun, Shuyan Wang, Bing Liu","doi":"10.1109/ICSMD57530.2022.10058241","DOIUrl":null,"url":null,"abstract":"Single Shot Detection (SSD) based Deep Neural Network (DNN) has been widely used in edge computing due to the properties of one-stage detection and high accuracy. Especially in Field Programmable Gate Array (FPGA) based acceleration, SSD can complete read-time object detection with higher efficiency. However, the acceleration of SSD has been suffered from constraints of system integration, size and power in strict scenarios. It requires all network inference to be done within single chip, as well as the acceleration of post-processing algorithm in SSD. To realize SSD acceleration in single chip, this paper proposes an optimized acceleration method of SSD for autonomous body detection scenario. The original post-processing algorithm is optimized through judging the probability threshold, which reduces the redundant computing operations of location box without losing detection accuracy. Meanwhile, an acceleration architecture is constructed to satisfy hardware constrained platform. In the experimental results, the optimized execution time is changed from 46.024ms to 9.277ms in software, and the accelerated time is further reduced to 1.117ms in hardware, which achieves performance improvement in 7.305 times. The proposed method can also be applied to other applications for the acceleration of post-processing algorithm.","PeriodicalId":396735,"journal":{"name":"2022 International Conference on Sensing, Measurement & Data Analytics in the era of Artificial Intelligence (ICSMD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Optimized Acceleration of Single Shot Detection for Edge Computing Based-on FPGA\",\"authors\":\"R. Wu, P. Fu, Lei Feng, Shan Sun, Shuyan Wang, Bing Liu\",\"doi\":\"10.1109/ICSMD57530.2022.10058241\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Single Shot Detection (SSD) based Deep Neural Network (DNN) has been widely used in edge computing due to the properties of one-stage detection and high accuracy. Especially in Field Programmable Gate Array (FPGA) based acceleration, SSD can complete read-time object detection with higher efficiency. However, the acceleration of SSD has been suffered from constraints of system integration, size and power in strict scenarios. It requires all network inference to be done within single chip, as well as the acceleration of post-processing algorithm in SSD. To realize SSD acceleration in single chip, this paper proposes an optimized acceleration method of SSD for autonomous body detection scenario. The original post-processing algorithm is optimized through judging the probability threshold, which reduces the redundant computing operations of location box without losing detection accuracy. Meanwhile, an acceleration architecture is constructed to satisfy hardware constrained platform. In the experimental results, the optimized execution time is changed from 46.024ms to 9.277ms in software, and the accelerated time is further reduced to 1.117ms in hardware, which achieves performance improvement in 7.305 times. The proposed method can also be applied to other applications for the acceleration of post-processing algorithm.\",\"PeriodicalId\":396735,\"journal\":{\"name\":\"2022 International Conference on Sensing, Measurement & Data Analytics in the era of Artificial Intelligence (ICSMD)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 International Conference on Sensing, Measurement & Data Analytics in the era of Artificial Intelligence (ICSMD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSMD57530.2022.10058241\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Sensing, Measurement & Data Analytics in the era of Artificial Intelligence (ICSMD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSMD57530.2022.10058241","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimized Acceleration of Single Shot Detection for Edge Computing Based-on FPGA
Single Shot Detection (SSD) based Deep Neural Network (DNN) has been widely used in edge computing due to the properties of one-stage detection and high accuracy. Especially in Field Programmable Gate Array (FPGA) based acceleration, SSD can complete read-time object detection with higher efficiency. However, the acceleration of SSD has been suffered from constraints of system integration, size and power in strict scenarios. It requires all network inference to be done within single chip, as well as the acceleration of post-processing algorithm in SSD. To realize SSD acceleration in single chip, this paper proposes an optimized acceleration method of SSD for autonomous body detection scenario. The original post-processing algorithm is optimized through judging the probability threshold, which reduces the redundant computing operations of location box without losing detection accuracy. Meanwhile, an acceleration architecture is constructed to satisfy hardware constrained platform. In the experimental results, the optimized execution time is changed from 46.024ms to 9.277ms in software, and the accelerated time is further reduced to 1.117ms in hardware, which achieves performance improvement in 7.305 times. The proposed method can also be applied to other applications for the acceleration of post-processing algorithm.