M. Watanabe, W. Chiappim, V. Christiano, S. G. S. Filho
{"title":"用于室内LED能量收集的MOS太阳能电池:光栅几何形状和栅极电介质厚度的影响","authors":"M. Watanabe, W. Chiappim, V. Christiano, S. G. S. Filho","doi":"10.1109/SBMicro.2019.8919375","DOIUrl":null,"url":null,"abstract":"This paper discusses the metal-oxide-semiconductor (MOS) solar cells for energy harvesting from indoor light emitting diode (LED) illumination using Al/SiO2/Si-p structures. Wafers of the Si-p (100) with a resistivity of $10\\Omega $.cm were used. The gate dielectric was grown by rapid thermal processing (RTP) with thicknesses of 1.65, 1.73, 2.10 and 2.23 nm. The main parameters studied were extracted using electrical characterization through IxV curves of the MOS solar cells with total areas of 3.24 $\\text{c}\\mathrm {m}^{2}$. At first, it was observed an increase of the dark current density from 0.49 to $4.4\\mu \\text{A}/\\text{c}\\mathrm {m}^{2}$ for the thickness varying from 1.65 to 2.23 nm. It is worthy of note the increase of the generated power from 8.1 to $46.7\\mu \\text{W}/\\text{c}\\mathrm {m}^{2}$ with the rise of the thickness in the range of 1.65 to 2.23 nm for a constant incident power of 5 mW/$\\text{c}\\mathrm {m}^{2}$. In this case, the lower the thickness, the higher the tunneling current through the gate dielectrics, which causes the decrease of the depletion region length and this decrease, in turn, makes the generation current density lower in the depletion region. Also, the reduction of the short-circuit current (JsC) due to the increase of the widths (W) and spacings (S) of the fishbone-grating geometry was well-correlated with the decrease of the perimeter (Pe) and the rise of the aspect ratio W/S.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"MOS solar cells for indoor LED energy harvesting: influence of the grating geometry and the thickness of the gate dielectrics\",\"authors\":\"M. Watanabe, W. Chiappim, V. Christiano, S. G. S. Filho\",\"doi\":\"10.1109/SBMicro.2019.8919375\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper discusses the metal-oxide-semiconductor (MOS) solar cells for energy harvesting from indoor light emitting diode (LED) illumination using Al/SiO2/Si-p structures. Wafers of the Si-p (100) with a resistivity of $10\\\\Omega $.cm were used. The gate dielectric was grown by rapid thermal processing (RTP) with thicknesses of 1.65, 1.73, 2.10 and 2.23 nm. The main parameters studied were extracted using electrical characterization through IxV curves of the MOS solar cells with total areas of 3.24 $\\\\text{c}\\\\mathrm {m}^{2}$. At first, it was observed an increase of the dark current density from 0.49 to $4.4\\\\mu \\\\text{A}/\\\\text{c}\\\\mathrm {m}^{2}$ for the thickness varying from 1.65 to 2.23 nm. It is worthy of note the increase of the generated power from 8.1 to $46.7\\\\mu \\\\text{W}/\\\\text{c}\\\\mathrm {m}^{2}$ with the rise of the thickness in the range of 1.65 to 2.23 nm for a constant incident power of 5 mW/$\\\\text{c}\\\\mathrm {m}^{2}$. In this case, the lower the thickness, the higher the tunneling current through the gate dielectrics, which causes the decrease of the depletion region length and this decrease, in turn, makes the generation current density lower in the depletion region. Also, the reduction of the short-circuit current (JsC) due to the increase of the widths (W) and spacings (S) of the fishbone-grating geometry was well-correlated with the decrease of the perimeter (Pe) and the rise of the aspect ratio W/S.\",\"PeriodicalId\":403446,\"journal\":{\"name\":\"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SBMicro.2019.8919375\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBMicro.2019.8919375","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
MOS solar cells for indoor LED energy harvesting: influence of the grating geometry and the thickness of the gate dielectrics
This paper discusses the metal-oxide-semiconductor (MOS) solar cells for energy harvesting from indoor light emitting diode (LED) illumination using Al/SiO2/Si-p structures. Wafers of the Si-p (100) with a resistivity of $10\Omega $.cm were used. The gate dielectric was grown by rapid thermal processing (RTP) with thicknesses of 1.65, 1.73, 2.10 and 2.23 nm. The main parameters studied were extracted using electrical characterization through IxV curves of the MOS solar cells with total areas of 3.24 $\text{c}\mathrm {m}^{2}$. At first, it was observed an increase of the dark current density from 0.49 to $4.4\mu \text{A}/\text{c}\mathrm {m}^{2}$ for the thickness varying from 1.65 to 2.23 nm. It is worthy of note the increase of the generated power from 8.1 to $46.7\mu \text{W}/\text{c}\mathrm {m}^{2}$ with the rise of the thickness in the range of 1.65 to 2.23 nm for a constant incident power of 5 mW/$\text{c}\mathrm {m}^{2}$. In this case, the lower the thickness, the higher the tunneling current through the gate dielectrics, which causes the decrease of the depletion region length and this decrease, in turn, makes the generation current density lower in the depletion region. Also, the reduction of the short-circuit current (JsC) due to the increase of the widths (W) and spacings (S) of the fishbone-grating geometry was well-correlated with the decrease of the perimeter (Pe) and the rise of the aspect ratio W/S.