全波电磁场求解器在封装到pcb建模中的有效分割方法

H. Dsilva, Abhishek Jain, Sasikala J, Amit Kumar
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引用次数: 1

摘要

今天的高数据速率(25 Gbps+)通道设计要求使用全波电磁场求解器对封装到印刷电路板接口进行建模。封装球栅阵列和印刷电路板衬垫的相互作用以及通孔走线路由导致阻抗不连续,考虑到高数据速率下通道性能对反射的敏感性,需要对其进行建模。由于全波电磁场求解器的使用受到可用计算资源和仿真时间的限制,有必要将封装到pcb的完整模型分成几个部分。本工作通过分段方法,探索了利用全波电磁场求解器对印刷电路板进行封装建模的方法。给出了在不同位置放置参考平面创建段,然后使用s参数级联的结果。通过插入损耗、回波损耗、串扰和时域反射等方法将分割结果与全模型的电磁场求解结果进行了比较。这项工作是通过使用全波电磁场求解器进行高速封装到pcb建模的分割方法,提出一种有效的参考平面放置方法的尝试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Effective Segmentation approach of Package-to-PCB modeling using Full-Wave EM field Solver
Today’s design of high data rate (25 Gbps+) channel calls out modeling of the package to printed circuit board interface using full-wave electromagnetic field solvers. The interaction of the package ball grid array and printed circuit board pad along with via to trace routing leads to an impedance discontinuity, which needs to be modeled given sensitivity of channel performance to reflections at high data rates. There is a need to break the package-to-PCB full model into segments as the use of full-wave electromagnetic field solvers are limited by available computational resources & simulation time. This work explores the package to printed circuit board modeling using full-wave electromagnetic field solver through the segmentation approach. Presented are results on placement of reference planes at different locations in creating segments and then cascading using S-parameters. Results through insertion loss, return loss, crosstalk and time domain reflectometry are shown in comparing the results of the segmentation approach with that of the full model using electromagnetic field solver. This effort is an attempt at presenting a valid approach at placement of reference planes through the segmentation approach using full-wave electromagnetic field solver for high speed package-to-PCB modeling.
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