{"title":"异构MapReduce架构的基于python的编程框架","authors":"G. Popescu, Călin Bîră","doi":"10.1109/comm54429.2022.9817183","DOIUrl":null,"url":null,"abstract":"This paper presents a low-maintenance, short development-cycle programming framework (MRAFW) which allows writing and running software for a custom heterogeneous pseudo-reconfigurable computing system integrating a MapReduce Accelerator. The target system implementation is based on AMD/Xilinx's Zynq SoC hardware platform. The programming framework uses the PYNQ software package to enable access to the system resources and to manage CPU-FPGA program and data transfers. Furthermore, we provide a library of optimized low-level functions that offer support for executing some basic linear algebra operations.","PeriodicalId":118077,"journal":{"name":"2022 14th International Conference on Communications (COMM)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Python-Based Programming Framework for a Heterogeneous MapReduce Architecture\",\"authors\":\"G. Popescu, Călin Bîră\",\"doi\":\"10.1109/comm54429.2022.9817183\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low-maintenance, short development-cycle programming framework (MRAFW) which allows writing and running software for a custom heterogeneous pseudo-reconfigurable computing system integrating a MapReduce Accelerator. The target system implementation is based on AMD/Xilinx's Zynq SoC hardware platform. The programming framework uses the PYNQ software package to enable access to the system resources and to manage CPU-FPGA program and data transfers. Furthermore, we provide a library of optimized low-level functions that offer support for executing some basic linear algebra operations.\",\"PeriodicalId\":118077,\"journal\":{\"name\":\"2022 14th International Conference on Communications (COMM)\",\"volume\":\"66 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 14th International Conference on Communications (COMM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/comm54429.2022.9817183\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 14th International Conference on Communications (COMM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/comm54429.2022.9817183","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Python-Based Programming Framework for a Heterogeneous MapReduce Architecture
This paper presents a low-maintenance, short development-cycle programming framework (MRAFW) which allows writing and running software for a custom heterogeneous pseudo-reconfigurable computing system integrating a MapReduce Accelerator. The target system implementation is based on AMD/Xilinx's Zynq SoC hardware platform. The programming framework uses the PYNQ software package to enable access to the system resources and to manage CPU-FPGA program and data transfers. Furthermore, we provide a library of optimized low-level functions that offer support for executing some basic linear algebra operations.