A Simulation Study of Combining Load Value and Address Predictors

In this paper, we evaluate a variety of combinations of a load value predictor and a load address predictor. We consider a dynamic hybrid predictor using a predictor selection counter, a static hybrid predictor utilizing execution profiles, and a cooperative predictor. The cooperative predictor is a load value predictor supported by a load address predictor when it is unable to predict a load value. The static hybrid and the cooperative predictors have a benefit that the hardware cost of the selection counter is removed. On the other hand, the dynamic hybrid and the cooperative predictors are free from tedious process of profiling. Based on cycle-by-cycle simulations, we have evaluated the variations and found that the cooperative predictor exploits instruction level parallelism most effectively.