一种校验算术单元制造技术

AFIPS '65 (Fall, part I) Pub Date : 1965-11-30 DOI:10.1145/1463891.1463969

Richard A. Davis

{"title":"一种校验算术单元制造技术","authors":"Richard A. Davis","doi":"10.1145/1463891.1463969","DOIUrl":null,"url":null,"abstract":"In conjunction with studies of mechanizations for a 30-bit digital computer arithmetic unit, an investigation of techniques for checking arithmetic unit operations was conducted. The objectives were to provide maximum protection against undetected errors, while holding the cost of checking to a minimum. In addition, no loss of arithmetic unit speed should result. Finally, the checking process should give protection against memory-unit-induced errors.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A checking arithmetic unit\",\"authors\":\"Richard A. Davis\",\"doi\":\"10.1145/1463891.1463969\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In conjunction with studies of mechanizations for a 30-bit digital computer arithmetic unit, an investigation of techniques for checking arithmetic unit operations was conducted. The objectives were to provide maximum protection against undetected errors, while holding the cost of checking to a minimum. In addition, no loss of arithmetic unit speed should result. Finally, the checking process should give protection against memory-unit-induced errors.\",\"PeriodicalId\":143723,\"journal\":{\"name\":\"AFIPS '65 (Fall, part I)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1965-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"AFIPS '65 (Fall, part I)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1463891.1463969\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"AFIPS '65 (Fall, part I)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1463891.1463969","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 5

摘要

结合对30位数字计算机算术单元机械化的研究，对检查算术单元操作的技术进行了调查。其目标是提供最大限度的保护，防止未检测到的错误，同时将检查成本降至最低。此外，不应造成算术单位速度的损失。最后，检查过程应该对内存单元引起的错误提供保护。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A checking arithmetic unit

In conjunction with studies of mechanizations for a 30-bit digital computer arithmetic unit, an investigation of techniques for checking arithmetic unit operations was conducted. The objectives were to provide maximum protection against undetected errors, while holding the cost of checking to a minimum. In addition, no loss of arithmetic unit speed should result. Finally, the checking process should give protection against memory-unit-induced errors.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

AFIPS '65 (Fall, part I)

自引率

0.00%

发文量