Vivek Shivaram, S. H, Niranjan Hegde, Shubha B, Yogesh Pai, Venkatraj M
{"title":"WBG-DPT电路去斜探头及功率环路电感估计方法","authors":"Vivek Shivaram, S. H, Niranjan Hegde, Shubha B, Yogesh Pai, Venkatraj M","doi":"10.1109/APEC43580.2023.10131563","DOIUrl":null,"url":null,"abstract":"Semiconductor materials in power electronics are transitioning from silicon to Wide Band-Gap (WBG) semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) due to their superior performance at higher power levels in automotive and industrial applications. The SiC MOSFET is a promising candidate for next generation power devices since it works at higher voltages, with higher switching speeds and higher thermal conductivity than conventional silicon (Si) devices. The preferred test method to measure the switching parameters of WBG is performed using the Double Pulse Test (DPT) method. Each oscilloscope probe has its own characteristic propagation delay contributing to varying delay in simultaneous acquisition of current and voltage during DPT. It is difficult to remove skew at high dynamic range because of the limitations of present de-skew fixtures. This paper proposes an algorithm to model drain to source voltage using current and to remove WBG waveform skew mathematically post waveform acquisition. This algorithm is demonstrated using WBG-DPT circuit with oscilloscopes analyzing switching loss. Also, the paper demonstrates the modelling of effective power loop inductance at WBG device transitions using drain to source voltage and drain current. The paper includes automation and optimization techniques to model effective power loop inductance in fewer iterations.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A method to de-skew probes and estimate power loop inductance of WBG-DPT circuits\",\"authors\":\"Vivek Shivaram, S. H, Niranjan Hegde, Shubha B, Yogesh Pai, Venkatraj M\",\"doi\":\"10.1109/APEC43580.2023.10131563\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Semiconductor materials in power electronics are transitioning from silicon to Wide Band-Gap (WBG) semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) due to their superior performance at higher power levels in automotive and industrial applications. The SiC MOSFET is a promising candidate for next generation power devices since it works at higher voltages, with higher switching speeds and higher thermal conductivity than conventional silicon (Si) devices. The preferred test method to measure the switching parameters of WBG is performed using the Double Pulse Test (DPT) method. Each oscilloscope probe has its own characteristic propagation delay contributing to varying delay in simultaneous acquisition of current and voltage during DPT. It is difficult to remove skew at high dynamic range because of the limitations of present de-skew fixtures. This paper proposes an algorithm to model drain to source voltage using current and to remove WBG waveform skew mathematically post waveform acquisition. This algorithm is demonstrated using WBG-DPT circuit with oscilloscopes analyzing switching loss. Also, the paper demonstrates the modelling of effective power loop inductance at WBG device transitions using drain to source voltage and drain current. The paper includes automation and optimization techniques to model effective power loop inductance in fewer iterations.\",\"PeriodicalId\":151216,\"journal\":{\"name\":\"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-03-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC43580.2023.10131563\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC43580.2023.10131563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A method to de-skew probes and estimate power loop inductance of WBG-DPT circuits
Semiconductor materials in power electronics are transitioning from silicon to Wide Band-Gap (WBG) semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) due to their superior performance at higher power levels in automotive and industrial applications. The SiC MOSFET is a promising candidate for next generation power devices since it works at higher voltages, with higher switching speeds and higher thermal conductivity than conventional silicon (Si) devices. The preferred test method to measure the switching parameters of WBG is performed using the Double Pulse Test (DPT) method. Each oscilloscope probe has its own characteristic propagation delay contributing to varying delay in simultaneous acquisition of current and voltage during DPT. It is difficult to remove skew at high dynamic range because of the limitations of present de-skew fixtures. This paper proposes an algorithm to model drain to source voltage using current and to remove WBG waveform skew mathematically post waveform acquisition. This algorithm is demonstrated using WBG-DPT circuit with oscilloscopes analyzing switching loss. Also, the paper demonstrates the modelling of effective power loop inductance at WBG device transitions using drain to source voltage and drain current. The paper includes automation and optimization techniques to model effective power loop inductance in fewer iterations.