Real-time digitized neural-spike storage scheme in multiple channels for biomedical applications

The recording of real time Neural-spikes (N-spikes) into an on-chip memory module is essential for processing the stored information having use in neurological applications like neural spike sorting. Spike sorting is a process used in bio-medical signal processing where incoming real-time spikes are mapped to the neuron from which it originates. In this paper, power and area efficient architectural level storage schemes of digitized N-spikes recorded through multiple channels into a Single Port Random Access Memory (SPRAM) module have been compared. The power dissipation of the proposed storage scheme is in the order of few μW. The architectural level analysis of the schemes has been performed in 0.18μm CMOS process technology using the Synopsys design compiler tool.