全耗尽薄膜SOI mosfet的阈值电压和跨导

C. Lee, P. Wyatt
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引用次数: 2

摘要

只提供摘要形式。在轻掺杂或近本征薄膜SOI mosfet中,费米电位phi /sub B/接近于零。如果将阈值外推为线性区域的零电流,则在阈值条件下,靠近表面的自由载流子浓度不为零,并且可能大于这些薄膜中杂质电荷的浓度。在这种情况下,模拟表明,前表面电位Psi /sub sf/,即从假设的中性膜体到前表面的能带弯曲,大大大于2 phi /sub B/。因此,将阈值条件Psi /sub sf/=2 phi /sub B/定义为强反转的起始点与外推法确定阈值的实验技术是不一致的。仿真结果表明,当phi /sub B/小于0.35 V时,达到零后门偏置阈值条件需要临界表面电位弯曲phi /sub B/+0.35 V。这种临界表面电位弯曲是后门偏压的弱函数。在阈值条件下,完全耗尽SOI mosfet的阈值电压和表面电位不受反转层电荷存在的显著影响,即使反转层电荷比轻掺杂Si薄膜的杂质电荷大得多。前门线性跨导对后门器件参数相对不敏感,尽管前门阈值电压依赖于它们。模拟结果表明,在10/sup 15/ cm/sup -3/左右时,跨导率基本保持不变,然后随着掺杂浓度的增加而迅速下降,这是由于迁移率的降低。如果迁移率效应不显著,且源/漏极电阻不足以成为限制因素,则跨导与硅膜厚度无关。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Threshold voltage and transconductance of fully depleted thin-film SOI MOSFETs
Summary form only given. In lightly doped or near-intrinsic thin-film SOI MOSFETs, the Fermi potential phi /sub B/ is close to zero. If threshold is defined by extrapolation to zero current from the linear region, then at the threshold condition the concentration of free carriers close to the surface is not zero, and may be greater than that of impurity charges in these films. In this case simulation shows that the front-surface potential Psi /sub sf/, which is the band bending from a hypothetical neutral film body to the front surface, is substantially greater than 2 phi /sub B/. Therefore, the definition of threshold condition Psi /sub sf/=2 phi /sub B/ as the onset of strong inversion is not consistent with the experimental technique of determining threshold by extrapolation. The simulations indicate that critical surface-potential bending of phi /sub B/+0.35 V is required to reach the threshold condition at zero back-gate bias when phi /sub B/ is less than 0.35 V. This critical surface-potential bending is found to be a weak function of back-gate bias. The threshold voltage and surface potentials of fully depleted SOI MOSFETs at the threshold condition are not significantly affected by the presence of inversion-layer charge even if it is much greater than the impurity charge as in the case of lightly doped Si films. The front-gate linear transconductance is relatively insensitive to the back-gate device parameters even though the front-gate threshold voltage is dependent on them. Simulations show that the transconductance remains nearly constant up to about 10/sup 15/ cm/sup -3/ and then falls off rapidly with increasing doping concentration as a result of mobility degradation. The transconductance is independent of Si film thickness if the mobility effect is not significant and the source/drain resistance is not high enough to become the limiting factor.<>
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