用于物联网应用的0.5V真单相16T 180纳米CMOS触发器

Zhi-Zhong Wang, Y. Hung, Jun-Ting Wu, Zheng-Jie Hong, Jin-Fa Lin
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引用次数: 1

摘要

提出了一种仅使用16晶体管的低电压、低功耗真单相触发器(FF)设计。采用混合逻辑方案,改进了传统的主从式设计,减少了布局面积。优化后的FF具有更好的功率和面积性能。仿真结果表明,采用台积电CMOS 180nm制程的设计实现了传统TGFF设计,能耗降低67.3%,版图面积减少30.8%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 0.5V True-Single-Phase 16T Flip-Flop in 180-nm CMOS for IoT Applications
A low voltage and low power true-single-phase flip-flop (FF) design using 16-transistor only is proposed. It is adapted from conventional master-slave based design and reduces layout area by using hybrid logic scheme. Optimization measures have resulted in a new FF with better power and area performances. Based on simulation results using the TSMC CMOS 180nm, our design achieves the conventional TGFF design by 67.3% in energy and 30.8% in layout area.
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