Single cycle RISC-V micro architecture processor and its FPGA prototype

In this paper, development of a fully synthesizable 32-bit processor based on the open-source RISC-V (RV32I) ISA is presented. This processor is designed for targeting low-cost embedded devices. A RISC-V development and validation framework with assembling tools and automated test suits is also presented in this paper. The resulting processor is a single core, in-order, non-bus based, RISC-V processor with low hardware complexity. The proposed processor is implemented in Verilog HDL and further prototyped on FPGA "Spartan 3E XC3S500E" board. This is found that the maximum operating frequency is 32MHz. The power is estimated to be 7.9mW using Xilinx Power Analyzer.