A low voltage CMOS implementation of a linear cellular neural network for image processing applications

This paper describe the design of a basic cell for the implementation of a Linear Cellular Neural Network (LCNN). This kind of system could be considered as resistive networks but as its basis are a new way of analog image processing system based on bayesian estimation and regularization theory then a new class of Cellular Neural Networks (CNN), whose activation function is a linear function, emerge in a natural way. This LCNN has characteristic that enable gray-scale image processing. The main focus in this work is the Low Voltage CMOS (LVCMOS) design of the basic building blocks that compose the basic cell of this systems. The design was fabricated on a 0.18 /spl mu/m LVCMOS technology.