{"title":"使用亚微米铜互连的多层金属","authors":"B. Rogers, S. Bothra, S. Bobbio, M. Kellam","doi":"10.1109/SSST.1992.712179","DOIUrl":null,"url":null,"abstract":"A copper-based multilevel metallurgy potentially offers very significant benefits compared to the aluminum alloys and barrier layers that currently are being used in ultralarge-scale integrated (ULSI) technology. However, before copper can be successfully integrated into ULSI systems, a number of important reliability and processing issues must be addressed. At MCNC, a comprehensive program is underway to develop an integrated copper metallurgy process. In this paper, an analysis of the effects of scaling on interconnect delay is given, demonstrating the potential benefits of a copper metallurgy for ULSI circuits. Then, work toward the development of an integrated copper metallurgy process is presented, including copper etching results, a copper cladding methodology to alleviate reliability problems, and a novel via chain structure.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"109 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multilevel Metal Using Submicron Copper Interconnects\",\"authors\":\"B. Rogers, S. Bothra, S. Bobbio, M. Kellam\",\"doi\":\"10.1109/SSST.1992.712179\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A copper-based multilevel metallurgy potentially offers very significant benefits compared to the aluminum alloys and barrier layers that currently are being used in ultralarge-scale integrated (ULSI) technology. However, before copper can be successfully integrated into ULSI systems, a number of important reliability and processing issues must be addressed. At MCNC, a comprehensive program is underway to develop an integrated copper metallurgy process. In this paper, an analysis of the effects of scaling on interconnect delay is given, demonstrating the potential benefits of a copper metallurgy for ULSI circuits. Then, work toward the development of an integrated copper metallurgy process is presented, including copper etching results, a copper cladding methodology to alleviate reliability problems, and a novel via chain structure.\",\"PeriodicalId\":359363,\"journal\":{\"name\":\"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory\",\"volume\":\"109 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSST.1992.712179\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSST.1992.712179","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multilevel Metal Using Submicron Copper Interconnects
A copper-based multilevel metallurgy potentially offers very significant benefits compared to the aluminum alloys and barrier layers that currently are being used in ultralarge-scale integrated (ULSI) technology. However, before copper can be successfully integrated into ULSI systems, a number of important reliability and processing issues must be addressed. At MCNC, a comprehensive program is underway to develop an integrated copper metallurgy process. In this paper, an analysis of the effects of scaling on interconnect delay is given, demonstrating the potential benefits of a copper metallurgy for ULSI circuits. Then, work toward the development of an integrated copper metallurgy process is presented, including copper etching results, a copper cladding methodology to alleviate reliability problems, and a novel via chain structure.