K. Sinha, D. Farley, T. Kahnert, A. Dasgupta, J. Caers, X.J. Zhao
{"title":"粘接倒装芯片互连中Au-Au“冷焊”的结合强度","authors":"K. Sinha, D. Farley, T. Kahnert, A. Dasgupta, J. Caers, X.J. Zhao","doi":"10.1109/ESIME.2011.5765834","DOIUrl":null,"url":null,"abstract":"In the conversion towards Pb-free electronics, there has been increasing interest in conductive adhesive interconnects, as they combine Pb-free materials with an attractive, low temperature, processing. One such promising packaging concept is direct bonding of flip-chip dies onto printed wiring boards (PWBs), with adhesive bonds between a gold-bumped flip-chip IC and matching gold-plated copper pads on a substrate. The goal is to achieve very high I/O densities per unit area, that are currently difficult to achieve, but are critical enablers for next-generation flexible electronic system. The fabrication process relies on adhesive joining methods and requires the simultaneous application of adhesive, pressure, temperature, and time to form the interconnection. The reliability of this interconnection under cyclic thermal excursions is traditionally believed to be governed by stress relaxation mechanisms in the adhesive. However, experiments conducted in this study suggest that under typical bonding conditions, a metallurgical bond can be established between these mating gold surfaces, due to cold-welding. If true, this implies a significantly different reliability mechanism for this interconnection method, and this mechanism must be understood so we can harness it for optimum reliability. The aim of this research work is to improve the effectiveness of interconnection processes for Au bumped flip-chip ICs. If successful, this study will enable significant cost-effective improvements in the reliability of wafer-level IC packaging technologies.","PeriodicalId":115489,"journal":{"name":"2011 12th Intl. Conf. on Thermal, Mechanical & Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"358 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Au-Au ‘cold-weld’ bond strength in adhesively bonded flip-chip interconnects\",\"authors\":\"K. Sinha, D. Farley, T. Kahnert, A. Dasgupta, J. Caers, X.J. Zhao\",\"doi\":\"10.1109/ESIME.2011.5765834\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the conversion towards Pb-free electronics, there has been increasing interest in conductive adhesive interconnects, as they combine Pb-free materials with an attractive, low temperature, processing. One such promising packaging concept is direct bonding of flip-chip dies onto printed wiring boards (PWBs), with adhesive bonds between a gold-bumped flip-chip IC and matching gold-plated copper pads on a substrate. The goal is to achieve very high I/O densities per unit area, that are currently difficult to achieve, but are critical enablers for next-generation flexible electronic system. The fabrication process relies on adhesive joining methods and requires the simultaneous application of adhesive, pressure, temperature, and time to form the interconnection. The reliability of this interconnection under cyclic thermal excursions is traditionally believed to be governed by stress relaxation mechanisms in the adhesive. However, experiments conducted in this study suggest that under typical bonding conditions, a metallurgical bond can be established between these mating gold surfaces, due to cold-welding. If true, this implies a significantly different reliability mechanism for this interconnection method, and this mechanism must be understood so we can harness it for optimum reliability. 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Au-Au ‘cold-weld’ bond strength in adhesively bonded flip-chip interconnects
In the conversion towards Pb-free electronics, there has been increasing interest in conductive adhesive interconnects, as they combine Pb-free materials with an attractive, low temperature, processing. One such promising packaging concept is direct bonding of flip-chip dies onto printed wiring boards (PWBs), with adhesive bonds between a gold-bumped flip-chip IC and matching gold-plated copper pads on a substrate. The goal is to achieve very high I/O densities per unit area, that are currently difficult to achieve, but are critical enablers for next-generation flexible electronic system. The fabrication process relies on adhesive joining methods and requires the simultaneous application of adhesive, pressure, temperature, and time to form the interconnection. The reliability of this interconnection under cyclic thermal excursions is traditionally believed to be governed by stress relaxation mechanisms in the adhesive. However, experiments conducted in this study suggest that under typical bonding conditions, a metallurgical bond can be established between these mating gold surfaces, due to cold-welding. If true, this implies a significantly different reliability mechanism for this interconnection method, and this mechanism must be understood so we can harness it for optimum reliability. The aim of this research work is to improve the effectiveness of interconnection processes for Au bumped flip-chip ICs. If successful, this study will enable significant cost-effective improvements in the reliability of wafer-level IC packaging technologies.