采用180nm CMOS技术的单片2.4GHz正交LNA-IQ混频器

Zechariah Balan, H. Ramiah, J. Rajendran
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引用次数: 4

摘要

本文介绍了一种采用标准180nm CMOS技术的2.4GHz单片正交低噪声放大器(QLNA)和IQ混频器。使用ii型RC-CR网络在RF路径中实现正交生成,该网络具有良好的相位和幅度平衡,同时减少插入损耗,使其不易受工艺变化和外部元件的影响。采用各种电路技术,如PCSNIM和低功耗优化,在功耗和成本方面获得良好的性能。在LNA阶段的实现中,采用了感应源退化和感应负载,实现了低噪声、高增益和良好的输入匹配。混合级集成了一个主动IQ混频器与低通滤波器(LPF)负载。采用放流技术,进一步提高了转换增益和噪声性能。该设计的提取结果显示,在中频100MHz时,增益为22dB,噪声系数(NF)为9dB。输入1 db压缩点(P1DB)和输入参考三阶截距点(IIP3)分别为−20 dBm和−11dBm。整体qlna混频器从1.8 V的净空消耗3.5 mA的电流。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A single chip 2.4GHz quadrature LNA-IQ mixer in 180nm CMOS technology
This paper presents a 2.4GHz single chip quadrature low noise amplifier (QLNA) and IQ mixer in standard 180 nm CMOS technology. Quadrature generation is achieved in the RF path using a type-II RC-CR network which exhibits good phase and amplitude balance while reducing insertion loss making it less vulnerable to process variations and external components. Various circuit techniques such as PCSNIM and low power optimization are adopted to acquire good performance with respect to power consumption and cost. In the implementation of LNA stage, an inductive source degeneration and inductive loading is used for low noise, high gain and good input matching. The mixing stage integrates an active IQ mixer with low pass filter (LPF) load. Current bleeding technique is adopted to further improve the conversion gain and noise performance. The extracted results of this proposed design shows a high gain of 22dB at IF frequency of 100MHz with a noise figure (NF) of 9dB. The input 1-dB compression point (P1DB) and input referred third-order intercept point (IIP3) are −20 dBm and −11dBm respectively. The overall QLNA-mixer consumes 3.5 mA of current from a 1.8 V headroom.
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