PL/I compilation: an application of a microprocessor network

With the recent increase in microprocessor use today, there is an ever increasing need for high-level languages for microprocessors. Instead of developing a cross compiler to produce suitable object code, a resident compiler should be developed.In order to increase the speed of the compilation, several microprocessors shall be used to perform the task. The compiler itself will not be an optimizing version and will be modularized so that it may be implemented on different size networks with changes only in the executive program.The microprocessor network will be constructed so that it may be used for other functions, not only to compile high level languages. The network implementation should be price-attractive, that is, the cost of implementing the network is competitive with the price of microprocessor compilers currently available on the market today.Although this paper is concentrating on an alternative to non-resident compilers for microprocessors, it is also to introduce another method for processor interconnection in multiprocessor networks and arrays.