高精度时域比较器的设计

Juzhe Li, Xu Liu, Jiahui Liu, Di Zhao, Wenrui Yan, Chengju Bi
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引用次数: 1

摘要

提出了一种高速高精度时域比较器集成电路。该比较器采用压控振荡器电路和时间放大器,可以高精度地将模拟输入电压转换为时域相位差。通过在压控振荡器中引入反馈,并在接下来的阶段使用鉴相器直接判断两个信号之间的相位差,可以高速比较输入信号。该比较器采用SMIC $\mathbf{0.18\ \mu m}$ CMOS工艺设计。仿真结果表明,在1 V电源下,该比较器实现了$\mathbf{0.1\ \mu V}$的精度、181 MHz的最大响应速度和$\mathbf{86\ \mu W}$的功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of a High-Precision Time-Domain Comparator
This paper presents a high-speed and high-precision time-domain comparator integrated circuit. The proposed comparator adopts a voltage-controlled oscillator circuit and a time amplifier, to convert the analog input voltage to a phase difference in time domain with high precision. By introducing a feedback for VCO and using the phase detector in the following stage to judge the phase differences between two signals directly, the input signals can be compared in a high speed. The comparator is designed in SMIC $\mathbf{0.18\ \mu m}$ CMOS process technology. The simulation results show that under 1 V power supply, this comparator achieves $\mathbf{0.1\ \mu V}$ accuracy, 181 MHz maximum response speed, and $\mathbf{86\ \mu W}$ power consumption.
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