Optimal fundamental switching frequency pulsewidth modulation of medium voltage cascade nine-level (9L) inverter

Medium voltage high power drives require low device switching frequency operation to bring down the dominating device switching losses. However, low device switching frequency operation leads to increase in total harmonic distortion (THD) of machine stator currents. Synchronous optimal pulsewidth modulation (SOP) is an emerging technique for controlling multilevel inverters of medium voltage drives at low device switching frequency, while maintaining minimal harmonic distortion of machine stator currents. In case of five or higher-level multilevel inverters, state-of-the-art generalized SOP technique requires swapping of gating signals to ensure equal device switching frequency. In addition, transients in machine currents occur at higher modulation index values due to frequent change in number of switching instants. The goal of our study is to propose a new SOP technique that ensures, equal device switching frequency without swapping of gating signals, further reduction of the device switching frequency compared to the generalized SOP technique and reduction in transients in machine currents at higher modulation index range. The proposed SOP technique was demonstrated on a cascade nine-level (9L) inverter fed 1.5-kW induction motor drive.