Jun-ming Lin, Zhi-hao Zhang, Y. Kai, Sizhen Li, Q. Cai, Jiajin Li, Gary Zhang
{"title":"一种s波段应用的带高谐波抑制匹配电路的线性增强宽带f类功率放大器","authors":"Jun-ming Lin, Zhi-hao Zhang, Y. Kai, Sizhen Li, Q. Cai, Jiajin Li, Gary Zhang","doi":"10.1109/ICMMT.2016.7761745","DOIUrl":null,"url":null,"abstract":"A broadband power amplifier (PA) with linearity enhanced technology for S-band applications, is presented. For good linearity and high efficiency performance, a Class-F PA core with improved linearizing bias circuits is employed and integrated on a 1.1×1.1×0.82 mm3 die using an InGaP/GaAs HBT process. The linearizing bias circuit is composed of current mirrors, compensated inductor and capacitor, thus that the overall power gain is enhanced as well as the gain flatness. Furthermore, several LC serial harmonic traps are immersed into the broadband output matching circuit for good harmonic suppression performance. To demonstrate the feasibility of the concept, the PA was tested with a continuous wave (CW) signal and generated an output power of 34 dBm and achieved a PAE of 54.5% at 2GHz. In addition, excellent harmonic suppression levels of less than -57 dBc across the second to fifth harmonic are obtained.","PeriodicalId":438795,"journal":{"name":"2016 IEEE International Conference on Microwave and Millimeter Wave Technology (ICMMT)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A linearity enhanced broadband Class-F power amplifier with high harmonic suppressed matching circuits for S-band applications\",\"authors\":\"Jun-ming Lin, Zhi-hao Zhang, Y. Kai, Sizhen Li, Q. Cai, Jiajin Li, Gary Zhang\",\"doi\":\"10.1109/ICMMT.2016.7761745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A broadband power amplifier (PA) with linearity enhanced technology for S-band applications, is presented. For good linearity and high efficiency performance, a Class-F PA core with improved linearizing bias circuits is employed and integrated on a 1.1×1.1×0.82 mm3 die using an InGaP/GaAs HBT process. The linearizing bias circuit is composed of current mirrors, compensated inductor and capacitor, thus that the overall power gain is enhanced as well as the gain flatness. Furthermore, several LC serial harmonic traps are immersed into the broadband output matching circuit for good harmonic suppression performance. To demonstrate the feasibility of the concept, the PA was tested with a continuous wave (CW) signal and generated an output power of 34 dBm and achieved a PAE of 54.5% at 2GHz. In addition, excellent harmonic suppression levels of less than -57 dBc across the second to fifth harmonic are obtained.\",\"PeriodicalId\":438795,\"journal\":{\"name\":\"2016 IEEE International Conference on Microwave and Millimeter Wave Technology (ICMMT)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Conference on Microwave and Millimeter Wave Technology (ICMMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMMT.2016.7761745\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Conference on Microwave and Millimeter Wave Technology (ICMMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMMT.2016.7761745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A linearity enhanced broadband Class-F power amplifier with high harmonic suppressed matching circuits for S-band applications
A broadband power amplifier (PA) with linearity enhanced technology for S-band applications, is presented. For good linearity and high efficiency performance, a Class-F PA core with improved linearizing bias circuits is employed and integrated on a 1.1×1.1×0.82 mm3 die using an InGaP/GaAs HBT process. The linearizing bias circuit is composed of current mirrors, compensated inductor and capacitor, thus that the overall power gain is enhanced as well as the gain flatness. Furthermore, several LC serial harmonic traps are immersed into the broadband output matching circuit for good harmonic suppression performance. To demonstrate the feasibility of the concept, the PA was tested with a continuous wave (CW) signal and generated an output power of 34 dBm and achieved a PAE of 54.5% at 2GHz. In addition, excellent harmonic suppression levels of less than -57 dBc across the second to fifth harmonic are obtained.