C. Chu, G. Luo, Kehuey Wu, Shih-Hong Chen, Chieng-Chung Hsu, Bo-Yuan Chen, Kun‐Lin Lin, Wen-Fa Wu, W. Yeh
{"title":"采用二维Ge/Si多层外延、优良的选择性蚀刻和共形单层掺杂制备五层堆叠Ge纳米片gaafet","authors":"C. Chu, G. Luo, Kehuey Wu, Shih-Hong Chen, Chieng-Chung Hsu, Bo-Yuan Chen, Kun‐Lin Lin, Wen-Fa Wu, W. Yeh","doi":"10.23919/SNW.2019.8782970","DOIUrl":null,"url":null,"abstract":"Horizontally five stacked pure-Ge nanosheets (NSs) GAA FETs are demonstrated. In this device process, we intentionally grow large mismatch Ge/Si multilayers rather than Ge/GeSi multilayers as the starting material, because the large difference of material properties between Ge/Si is beneficial to the selective etching process. In order to avoid island growth, the flat Ge/Si multilayers are grown at a low temperature. Due to the excellent selective etching, the shape of Ge NSs almost keeps unchanged after etching. Additionally we found the dislocations in suspended Ge sheets are more easily to remove than the case that Ge layers are still tied with Si layers. Since the stacked NSs channels is tall and the pitch between channels is short, the conventional wrap-around contact (WAC) is not applicable. Here for the first time we propose the conformal monolayer doping (MLD) method for source/drain doping of tall NSs FETs.","PeriodicalId":170513,"journal":{"name":"2019 Silicon Nanoelectronics Workshop (SNW)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The GAAFETs with Five Stacked Ge Nano-sheets Made by 2D Ge/Si Multilayer Epitaxy, Excellent Selective Etching, and Conformal Monolayer Doping\",\"authors\":\"C. Chu, G. Luo, Kehuey Wu, Shih-Hong Chen, Chieng-Chung Hsu, Bo-Yuan Chen, Kun‐Lin Lin, Wen-Fa Wu, W. Yeh\",\"doi\":\"10.23919/SNW.2019.8782970\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Horizontally five stacked pure-Ge nanosheets (NSs) GAA FETs are demonstrated. In this device process, we intentionally grow large mismatch Ge/Si multilayers rather than Ge/GeSi multilayers as the starting material, because the large difference of material properties between Ge/Si is beneficial to the selective etching process. In order to avoid island growth, the flat Ge/Si multilayers are grown at a low temperature. Due to the excellent selective etching, the shape of Ge NSs almost keeps unchanged after etching. Additionally we found the dislocations in suspended Ge sheets are more easily to remove than the case that Ge layers are still tied with Si layers. Since the stacked NSs channels is tall and the pitch between channels is short, the conventional wrap-around contact (WAC) is not applicable. Here for the first time we propose the conformal monolayer doping (MLD) method for source/drain doping of tall NSs FETs.\",\"PeriodicalId\":170513,\"journal\":{\"name\":\"2019 Silicon Nanoelectronics Workshop (SNW)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Silicon Nanoelectronics Workshop (SNW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/SNW.2019.8782970\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SNW.2019.8782970","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The GAAFETs with Five Stacked Ge Nano-sheets Made by 2D Ge/Si Multilayer Epitaxy, Excellent Selective Etching, and Conformal Monolayer Doping
Horizontally five stacked pure-Ge nanosheets (NSs) GAA FETs are demonstrated. In this device process, we intentionally grow large mismatch Ge/Si multilayers rather than Ge/GeSi multilayers as the starting material, because the large difference of material properties between Ge/Si is beneficial to the selective etching process. In order to avoid island growth, the flat Ge/Si multilayers are grown at a low temperature. Due to the excellent selective etching, the shape of Ge NSs almost keeps unchanged after etching. Additionally we found the dislocations in suspended Ge sheets are more easily to remove than the case that Ge layers are still tied with Si layers. Since the stacked NSs channels is tall and the pitch between channels is short, the conventional wrap-around contact (WAC) is not applicable. Here for the first time we propose the conformal monolayer doping (MLD) method for source/drain doping of tall NSs FETs.