{"title":"低密度奇偶校验码的可配置近似最小和译码算法","authors":"Ruizhen Wu, Lin Wang, Mingming Wang","doi":"10.1145/3357419.3357422","DOIUrl":null,"url":null,"abstract":"A configurable approximation Min-sum decoding algorithm for LDPC is proposed in this paper. The degradation factor of BP to MS is found and optimized based on Jacobian Logarithm and hardware working mode. The decoding algorithm is configurable to satisfy different environment's need and will only need update the variable memory. The simulation is based on LDPC NR 3GPP 38.212 release and the comparison results showed the proposed configurable approximation Min-sum decoding algorithm have a better BER performance. The hardware of this proposed algorithm is based on Min-sum decoder and the extra cost is only a shifter and an adder besides the configurable memory.","PeriodicalId":261951,"journal":{"name":"Proceedings of the 9th International Conference on Information Communication and Management","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Configurable Approximation Min-Sum Decoding Algorithm for Low Density Parity Check Codes\",\"authors\":\"Ruizhen Wu, Lin Wang, Mingming Wang\",\"doi\":\"10.1145/3357419.3357422\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A configurable approximation Min-sum decoding algorithm for LDPC is proposed in this paper. The degradation factor of BP to MS is found and optimized based on Jacobian Logarithm and hardware working mode. The decoding algorithm is configurable to satisfy different environment's need and will only need update the variable memory. The simulation is based on LDPC NR 3GPP 38.212 release and the comparison results showed the proposed configurable approximation Min-sum decoding algorithm have a better BER performance. The hardware of this proposed algorithm is based on Min-sum decoder and the extra cost is only a shifter and an adder besides the configurable memory.\",\"PeriodicalId\":261951,\"journal\":{\"name\":\"Proceedings of the 9th International Conference on Information Communication and Management\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-08-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 9th International Conference on Information Communication and Management\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3357419.3357422\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 9th International Conference on Information Communication and Management","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3357419.3357422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
提出了一种LDPC的可配置近似最小和译码算法。基于雅可比对数和硬件工作模式,找到并优化了BP对MS的退化因子。解码算法是可配置的,以满足不同的环境需要,只需要更新可变存储器。仿真结果表明,基于LDPC NR 3GPP 38.212版本的最小和译码算法具有较好的误码率性能。该算法的硬件是基于最小和解码器,除了可配置内存外,额外的开销仅为一个移位器和一个加法器。
A Configurable Approximation Min-Sum Decoding Algorithm for Low Density Parity Check Codes
A configurable approximation Min-sum decoding algorithm for LDPC is proposed in this paper. The degradation factor of BP to MS is found and optimized based on Jacobian Logarithm and hardware working mode. The decoding algorithm is configurable to satisfy different environment's need and will only need update the variable memory. The simulation is based on LDPC NR 3GPP 38.212 release and the comparison results showed the proposed configurable approximation Min-sum decoding algorithm have a better BER performance. The hardware of this proposed algorithm is based on Min-sum decoder and the extra cost is only a shifter and an adder besides the configurable memory.