利用多频带传输线互连提高多处理器片上系统的缓存相干性效率

Qi Hu, Kejun Wu, Peng Liu
{"title":"利用多频带传输线互连提高多处理器片上系统的缓存相干性效率","authors":"Qi Hu, Kejun Wu, Peng Liu","doi":"10.1109/SOCC.2015.7406990","DOIUrl":null,"url":null,"abstract":"Main-stream general-purpose microprocessors integrate a growing number of cores on-chip, requiring high-performance interconnects and efficient cache coherence for data transmission and sharing. Conventional directory-based cache coherence has high indirection overhead, which adds to the critical path of data requests and lowers overall system performance. In fact, with globally shared high-performance interconnects, cache coherence could be optimized and the indirection overhead could be relieved. This paper explores the use of multi-band transmission lines to implement globally shared interconnects. Taking advantage of the aggregate frequency band resources, the proposed interconnect supports efficient multi-cast, and helps improve the efficiency of cache coherence with augmented parallelism. Coherence indirections are avoided, and we have seen an average of 17% boost in application performance, as well as an average of 18% throughput improvement compared to an implementation of conventional cache coherence on single-band transmission line based interconnects.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Exploiting multi-band transmission line interconnects to improve the efficiency of cache coherence in multiprocessor system-on-chip\",\"authors\":\"Qi Hu, Kejun Wu, Peng Liu\",\"doi\":\"10.1109/SOCC.2015.7406990\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Main-stream general-purpose microprocessors integrate a growing number of cores on-chip, requiring high-performance interconnects and efficient cache coherence for data transmission and sharing. Conventional directory-based cache coherence has high indirection overhead, which adds to the critical path of data requests and lowers overall system performance. In fact, with globally shared high-performance interconnects, cache coherence could be optimized and the indirection overhead could be relieved. This paper explores the use of multi-band transmission lines to implement globally shared interconnects. Taking advantage of the aggregate frequency band resources, the proposed interconnect supports efficient multi-cast, and helps improve the efficiency of cache coherence with augmented parallelism. Coherence indirections are avoided, and we have seen an average of 17% boost in application performance, as well as an average of 18% throughput improvement compared to an implementation of conventional cache coherence on single-band transmission line based interconnects.\",\"PeriodicalId\":329464,\"journal\":{\"name\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2015.7406990\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406990","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

主流的通用微处理器集成了越来越多的片上核心,需要高性能互连和高效的缓存一致性来进行数据传输和共享。传统的基于目录的缓存一致性具有较高的间接开销,增加了数据请求的关键路径,降低了系统的整体性能。事实上,通过全局共享的高性能互连,可以优化缓存一致性并减轻间接开销。本文探讨了使用多频段传输线来实现全球共享互连。该互连利用聚合频带资源,支持高效的多播,并通过增强并行性提高缓存相干性的效率。由于避免了相干性间接,我们已经看到应用程序性能平均提高了17%,并且与基于单波段传输线互连的传统缓存相干性实现相比,吞吐量平均提高了18%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Exploiting multi-band transmission line interconnects to improve the efficiency of cache coherence in multiprocessor system-on-chip
Main-stream general-purpose microprocessors integrate a growing number of cores on-chip, requiring high-performance interconnects and efficient cache coherence for data transmission and sharing. Conventional directory-based cache coherence has high indirection overhead, which adds to the critical path of data requests and lowers overall system performance. In fact, with globally shared high-performance interconnects, cache coherence could be optimized and the indirection overhead could be relieved. This paper explores the use of multi-band transmission lines to implement globally shared interconnects. Taking advantage of the aggregate frequency band resources, the proposed interconnect supports efficient multi-cast, and helps improve the efficiency of cache coherence with augmented parallelism. Coherence indirections are avoided, and we have seen an average of 17% boost in application performance, as well as an average of 18% throughput improvement compared to an implementation of conventional cache coherence on single-band transmission line based interconnects.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信