{"title":"用于直接转换接收机的无直流偏置射频前端","authors":"Yuanjin Zheng, Shin Woei Leow, Dong Han, Y. Xu","doi":"10.1109/RFIC.2004.1320663","DOIUrl":null,"url":null,"abstract":"A DC offset free RF front-end receiver architecture, combined with a feedback tuning loop for direct conversion, is proposed. The front-end receiver is implemented in a 0.35 /spl mu/m CMOS process and achieves a measured DC offset less than 2 mV over an RF input range of -100 to 0 dBm and LO input of -20 to 15 dBm, respectively.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A DC offset free RF front-end for direct conversion receivers\",\"authors\":\"Yuanjin Zheng, Shin Woei Leow, Dong Han, Y. Xu\",\"doi\":\"10.1109/RFIC.2004.1320663\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A DC offset free RF front-end receiver architecture, combined with a feedback tuning loop for direct conversion, is proposed. The front-end receiver is implemented in a 0.35 /spl mu/m CMOS process and achieves a measured DC offset less than 2 mV over an RF input range of -100 to 0 dBm and LO input of -20 to 15 dBm, respectively.\",\"PeriodicalId\":140604,\"journal\":{\"name\":\"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2004.1320663\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2004.1320663","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A DC offset free RF front-end for direct conversion receivers
A DC offset free RF front-end receiver architecture, combined with a feedback tuning loop for direct conversion, is proposed. The front-end receiver is implemented in a 0.35 /spl mu/m CMOS process and achieves a measured DC offset less than 2 mV over an RF input range of -100 to 0 dBm and LO input of -20 to 15 dBm, respectively.
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