{"title":"压阻式换能器的低功耗接口电路","authors":"A. Donida, D. Barrettino","doi":"10.1109/I2MTC.2015.7151549","DOIUrl":null,"url":null,"abstract":"This paper presents the design and development of a low-power interface circuit for piezoresistive transducers. This circuit combines the chopping technique with the correlated double sampling (CDS) technique in order to eliminate both the amplifier offset and the chopper ripple at the sampling frequency. In addition, programmable current sources compensate for the transducer offset and the low frequency components coming from environmental conditions thus allowing the readout of very weak input signals with high resolution (0.45μV) at a total power consumption of 200 μW.","PeriodicalId":424006,"journal":{"name":"2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A low-power interface circuit for piezoresistive transducers\",\"authors\":\"A. Donida, D. Barrettino\",\"doi\":\"10.1109/I2MTC.2015.7151549\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and development of a low-power interface circuit for piezoresistive transducers. This circuit combines the chopping technique with the correlated double sampling (CDS) technique in order to eliminate both the amplifier offset and the chopper ripple at the sampling frequency. In addition, programmable current sources compensate for the transducer offset and the low frequency components coming from environmental conditions thus allowing the readout of very weak input signals with high resolution (0.45μV) at a total power consumption of 200 μW.\",\"PeriodicalId\":424006,\"journal\":{\"name\":\"2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/I2MTC.2015.7151549\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/I2MTC.2015.7151549","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power interface circuit for piezoresistive transducers
This paper presents the design and development of a low-power interface circuit for piezoresistive transducers. This circuit combines the chopping technique with the correlated double sampling (CDS) technique in order to eliminate both the amplifier offset and the chopper ripple at the sampling frequency. In addition, programmable current sources compensate for the transducer offset and the low frequency components coming from environmental conditions thus allowing the readout of very weak input signals with high resolution (0.45μV) at a total power consumption of 200 μW.