具有四面阴极的CMOS肖特基势垒二极管

Junyu Shi, Dasheng Cui, X. Lv
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引用次数: 3

摘要

设计并制作了n阱上的六硅肖特基二极管。对器件结构进行了深入分析。研究了主要参数对二极管截止频率的影响。分析表明,截止频率随肖特基接触面积的减小而增大。通过采用四面阴极可以进一步降低串联电阻。所设计的二极管达到了1.3太赫兹的截止频率。理想系数为1.34,势垒高度为0.38 eV。高截止频率使所提出的二极管适用于毫米波甚至太赫兹探测。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A CMOS Schottky barrier diode with the four-sided cathode
TiSix-Si Schottky diode on an n-well is designed and fabricated. The device structure is analyzed in depth. The influence of the main parameters on the diode's cut-off frequency is investigated. The analysis shows that the cut-off frequency increases as the Schottky contact area decreases. The series resistance can be further reduced by employing a four-sided cathode. The designed diode achieves the cut-off frequency of 1.3 THz. The ideality factor is 1.34, and the barrier height is 0.38 eV. The high cut-off frequency makes the proposed diodes suitable for millimeter wave even THz detection.
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