基于DDS-PLL的低噪声x波段频率源设计

P. Yao, Leijun Xu, Zhenhua Sun
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引用次数: 0

摘要

本文提出了一种DDS直接激励锁相环频率源,具有体积小、便携、稳定、相位噪声低、跳频快等特点。在设计中,通过理论计算合理设置环路带宽、相位裕度和相位检测频率,同时采用共面波导、马蹄形刻蚀和连续阻抗等方法提高系统性能。锁相环的频率范围为8.5GHz ~ 9.5GHz。当锁相环工作在9.0GHz时,相位噪声为- 115dBc,锁相时间为580ns。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of Low-Noise X-band Frequency Source Based on DDS-PLL
This paper proposes a DDS directly excites PLL frequency source, which is small, portable, stable, low-phase noise and fast frequency hopping. In the design, the loop bandwidth, phase margin, and phase detection frequency are set rationally through theoretical calculations, while coplanar waveguide, horseshoe-shaped etching, and continuous impedance are used to improve system performance. The frequency range of PLL is from 8.5GHz to 9.5GHz. The phase noise is −115dBc at 100KHz frequency offset, the phase locked time is 580ns when the PLL operating at 9.0GHz.
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