{"title":"基于DDS-PLL的低噪声x波段频率源设计","authors":"P. Yao, Leijun Xu, Zhenhua Sun","doi":"10.1109/ICCS51219.2020.9336603","DOIUrl":null,"url":null,"abstract":"This paper proposes a DDS directly excites PLL frequency source, which is small, portable, stable, low-phase noise and fast frequency hopping. In the design, the loop bandwidth, phase margin, and phase detection frequency are set rationally through theoretical calculations, while coplanar waveguide, horseshoe-shaped etching, and continuous impedance are used to improve system performance. The frequency range of PLL is from 8.5GHz to 9.5GHz. The phase noise is −115dBc at 100KHz frequency offset, the phase locked time is 580ns when the PLL operating at 9.0GHz.","PeriodicalId":193552,"journal":{"name":"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of Low-Noise X-band Frequency Source Based on DDS-PLL\",\"authors\":\"P. Yao, Leijun Xu, Zhenhua Sun\",\"doi\":\"10.1109/ICCS51219.2020.9336603\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a DDS directly excites PLL frequency source, which is small, portable, stable, low-phase noise and fast frequency hopping. In the design, the loop bandwidth, phase margin, and phase detection frequency are set rationally through theoretical calculations, while coplanar waveguide, horseshoe-shaped etching, and continuous impedance are used to improve system performance. The frequency range of PLL is from 8.5GHz to 9.5GHz. The phase noise is −115dBc at 100KHz frequency offset, the phase locked time is 580ns when the PLL operating at 9.0GHz.\",\"PeriodicalId\":193552,\"journal\":{\"name\":\"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCS51219.2020.9336603\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS51219.2020.9336603","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of Low-Noise X-band Frequency Source Based on DDS-PLL
This paper proposes a DDS directly excites PLL frequency source, which is small, portable, stable, low-phase noise and fast frequency hopping. In the design, the loop bandwidth, phase margin, and phase detection frequency are set rationally through theoretical calculations, while coplanar waveguide, horseshoe-shaped etching, and continuous impedance are used to improve system performance. The frequency range of PLL is from 8.5GHz to 9.5GHz. The phase noise is −115dBc at 100KHz frequency offset, the phase locked time is 580ns when the PLL operating at 9.0GHz.