FPGA PCI device design for ultrasound scanning system in prenatal healthcare

Low resource setting areas in developing and underdeveloped nations suffer acute shortage of healthcare providers and facilities. Due to this pregnant women suffer a lot in these areas. One of the important devices in prenatal healthcare that would benefit pregnant women is the ultra sound scanner. In this research work we implement the Peripheral Communication Interface Device for integration into the Front End Processing Module in of an ultrasound scanning system to be used in prenatal healthcare. We focus on the design, implementation, and verification of PCI protocol suitable for ultrasound scanning system. This is synthesized to fit into a Xilinx FPGA. The proposed interface device serves as a data regulator module for communication to control and regulate data transfer among various modules. It is used for data bandwidth handling purposes when the CPU needs to communicate with memory, Ultra scanner front end, and other devices in system. The design is implemented in Verilog HDL, verification carried out using Questasim and synthesized using the Xilinx ISE. The simulation and synthesis results are provided at the end.