Low cost reconfigurable Elliptic Crypto-hardware

In this paper, we present the design and implementation of an Elliptic Crypto-hardware over the Galois Field GF(2163) using Field Programmable Gate Arrays (FPGA), aiming to realize a comparative study in terms of space and speed through the different Xilinx technology families, such as the Spartan, the Virtex and the Kintex family. The proposed design is based on an optimized Karatsuba-Offman multiplier and a fixed set of squaring modules in the chain addition of the Itoh-Tsjuii algorithm. The obtained place and route (PAR) frequencies vary from 39 MHz within the Spartan 3, to 74MHz for the Virtex 4 and 133MHz for the Kintex 7. The designs have been compared to many stateof- the-art designs and showed good index performances.