可生存的自检顺序电路

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI:10.1109/DFTVS.2001.966793

A. Matrosova, S. Ostanin, I. Levin

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引用次数: 17

摘要

本文提出了一种完全自检同步顺序电路的设计方法，并研究了其在瞬态故障情况下的行为。我们处理的情况是电路能够在时钟数之后恢复。我们称拥有这种特性的SSC为可生存的SSC。本文提出了部分单调SSC的概念。证明了部分单调的ssc是可存活的。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Survivable self-checking sequential circuits

This paper presents a method for designing totally self-checking synchronous sequential circuits (SSC), and investigates their behavior in presence of transient faults. We deal with the case when the circuit is able to recover after the number of clocks. We call SSC owing this property as a survivable SSC. A concept of a partially monotonous SSC is developed in the paper. It is proven that the partially monotonous SSCs are survivable.

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Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

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