基于fpga的任意波形发生器的设计与实现

Min Xu, J. Hu, Y. Gao
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引用次数: 4

摘要

提出了一种采用集成DDS芯片作为基本频变时钟源的任意波形发生器(AWG)解决方案。时钟信号是由时钟分配器对DDS输出进行整形和提升后得到的,通过时钟信号驱动dac产生波形。构建波形所需的数据存储在高速缓存中,通过FPGA连续加载到dac中。在FPGA中建立了一个嵌入式进程,当需要整个系统的输出作为典型参考时,可以从包络线中插入数据。然后,AGC电路将dac输出的信号标准化为恒定的峰对峰值,VGA必须适应与设置相同的信号幅度。最后,信号通过BNC过滤波从该发生器流出。在作者的实践中,实现了200Msps速率和100MHz以上模拟带宽的性能演示。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA-Based Design and Implementation of Arbitrary Waveform Generator
This paper proposed a solution for arbitrary waveform generator (AWG), in which integrated DDS chip is engaged as the essential frequency variable clock source. DACs are driven to generate the waveforms by clock signals, which are obtained from the reshaping and shape lifting of output from DDS by clock distributor. The data to build waveform up are stored in cache and loaded into DACs continuously by FPGA. An embedded process was set up in FPGA and would interpolate data from envelope when output of whole system is required to be typical reference. AGC circuits then standardize signal out of DACs to a constant peak-to-peak value, and VGA is obliged to fit the amplitude of signal as same as settings. Finally, the signal flow out this generator via BNC over filtering. In author's practice, a demo with performance of 200Msps rate and 100MHz above analog bandwidth can be achieved.
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