{"title":"聚对二甲苯保形涂料与未清洁助焊剂残留物的相对相容性","authors":"R. Olson, J. Yira","doi":"10.1109/IEMT.1993.398207","DOIUrl":null,"url":null,"abstract":"Parylene coating tests of circuits produced with various no-clean soldering fluxes are conducted to determine the impact of no-clean circuit processing on the Parylene coatability of these boards. The properties and characteristics of Parylene conformal coating are described. Surface insulation resistance test procedures and results for no-clean flux/no-clean soldered and Parylene coated circuit samples are summarized.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"78 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Relative compatibility of Parylene conformal coatings with no-clean flux residues\",\"authors\":\"R. Olson, J. Yira\",\"doi\":\"10.1109/IEMT.1993.398207\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Parylene coating tests of circuits produced with various no-clean soldering fluxes are conducted to determine the impact of no-clean circuit processing on the Parylene coatability of these boards. The properties and characteristics of Parylene conformal coating are described. Surface insulation resistance test procedures and results for no-clean flux/no-clean soldered and Parylene coated circuit samples are summarized.<<ETX>>\",\"PeriodicalId\":206206,\"journal\":{\"name\":\"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium\",\"volume\":\"78 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1993.398207\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1993.398207","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Relative compatibility of Parylene conformal coatings with no-clean flux residues
Parylene coating tests of circuits produced with various no-clean soldering fluxes are conducted to determine the impact of no-clean circuit processing on the Parylene coatability of these boards. The properties and characteristics of Parylene conformal coating are described. Surface insulation resistance test procedures and results for no-clean flux/no-clean soldered and Parylene coated circuit samples are summarized.<>