Design of Polymer Insulators as Printed Gate Dielectric Layer for Organic Field Effect Transistors

We have investigated the influence of surface and bulk characteristics of polymer insulators as a printed gate dielectric layer for organic field-e ff ect transistors on the time variation of the drain current. Three components of time variation with di ff erent time scales were observed. The roughness and long-chain chemical species of the insulator surface enhanced the time variation with a time scale of several tens minutes. When the insulating polymer surface had dipoles, the drain current for organic field-e ff ect transistors（OFETs）significantly decreased with time. This decrease in drain current occurred several hundred milliseconds from the application of the gate voltage. The dielectric relaxation of polymer gate insulators caused an increase in the drain current immediately after the application of the gate voltage and lasted for several milliseconds. Based on the observed results, we suggested an ideal polymer gate insulator to achieve printed OFETs that have stability and high performance.