SPICE和Verilog之间的自动功能模型验证

IAS '95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting Pub Date : 1995-10-08 DOI:10.1109/IAS.1995.530422

M. Naum, Y. Inoue

{"title":"SPICE和Verilog之间的自动功能模型验证","authors":"M. Naum, Y. Inoue","doi":"10.1109/IAS.1995.530422","DOIUrl":null,"url":null,"abstract":"This paper outlines the development of a validation methodology suitable for testing and qualification of ASIC libraries. In particular this paper outlines a method which uses SPICE models in conjunction with Verilog models to validate the functionality of a Verilog library.","PeriodicalId":117576,"journal":{"name":"IAS '95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Automatic functional model validation between SPICE and Verilog\",\"authors\":\"M. Naum, Y. Inoue\",\"doi\":\"10.1109/IAS.1995.530422\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper outlines the development of a validation methodology suitable for testing and qualification of ASIC libraries. In particular this paper outlines a method which uses SPICE models in conjunction with Verilog models to validate the functionality of a Verilog library.\",\"PeriodicalId\":117576,\"journal\":{\"name\":\"IAS '95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IAS '95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IAS.1995.530422\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IAS '95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IAS.1995.530422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文概述了适用于ASIC库的测试和鉴定的验证方法的发展。特别地，本文概述了一种将SPICE模型与Verilog模型结合使用来验证Verilog库功能的方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Automatic functional model validation between SPICE and Verilog

This paper outlines the development of a validation methodology suitable for testing and qualification of ASIC libraries. In particular this paper outlines a method which uses SPICE models in conjunction with Verilog models to validate the functionality of a Verilog library.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IAS '95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting

自引率

0.00%

发文量