{"title":"多核服务器处理器热分析","authors":"Guoping Xu","doi":"10.1109/ITHERM.2017.7992504","DOIUrl":null,"url":null,"abstract":"To improve computing performance for server systems, increase in the number of CPU cores is one of the primary design parameters, in addition to higher frequency and advanced process technology node adoption. CPU core count, size, physical distribution and power density on the processor die could have great impact on thermal and computing performance. A thermal analysis is performed to understand these effects with the modeling assumptions: 60 mm × 60 mm flip chip lidded package, single die at size of 25 mm × 25 mm and total power dissipation of 300W. The thermal model including package and heat sink is set up to analyze variables such as core count, distribution and power level/density. To keep the processor temperature from exceeding the junction limit, dynamic voltage and frequency scaling (DVFS) is commonly used. A method to correlate thermal and computing performance based on DVFS, is also explored when junction temperature hits the limit. The impact of multi-core processor design on thermal performance is translated into the impact on computing performance under thermal constraints. Thermal guidance on multi-core processor die floor plan to optimize computing performance is provided.","PeriodicalId":387542,"journal":{"name":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Multi-core server processors thermal analysis\",\"authors\":\"Guoping Xu\",\"doi\":\"10.1109/ITHERM.2017.7992504\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To improve computing performance for server systems, increase in the number of CPU cores is one of the primary design parameters, in addition to higher frequency and advanced process technology node adoption. CPU core count, size, physical distribution and power density on the processor die could have great impact on thermal and computing performance. A thermal analysis is performed to understand these effects with the modeling assumptions: 60 mm × 60 mm flip chip lidded package, single die at size of 25 mm × 25 mm and total power dissipation of 300W. The thermal model including package and heat sink is set up to analyze variables such as core count, distribution and power level/density. To keep the processor temperature from exceeding the junction limit, dynamic voltage and frequency scaling (DVFS) is commonly used. A method to correlate thermal and computing performance based on DVFS, is also explored when junction temperature hits the limit. The impact of multi-core processor design on thermal performance is translated into the impact on computing performance under thermal constraints. Thermal guidance on multi-core processor die floor plan to optimize computing performance is provided.\",\"PeriodicalId\":387542,\"journal\":{\"name\":\"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)\",\"volume\":\"93 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITHERM.2017.7992504\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 16th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITHERM.2017.7992504","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
为了提高服务器系统的计算性能,除了采用更高的频率和先进的处理技术节点外,增加CPU内核的数量是主要的设计参数之一。CPU核数、大小、物理分布和处理器芯片上的功率密度可能对散热和计算性能有很大影响。为了理解这些影响,我们进行了热分析,建模假设为:60 mm × 60 mm倒装芯片盖封装,单个芯片尺寸为25 mm × 25 mm,总功耗为300W。建立了包括封装和散热器在内的热模型,以分析堆芯数量、分布和功率水平/密度等变量。为了防止处理器温度超过结限,通常采用动态电压和频率缩放(DVFS)。当结温达到极限时,还探讨了一种基于DVFS的热学和计算性能相关联的方法。多核处理器设计对热性能的影响转化为对热约束下计算性能的影响。为优化计算性能提供了多核处理器芯片平面散热指导。
To improve computing performance for server systems, increase in the number of CPU cores is one of the primary design parameters, in addition to higher frequency and advanced process technology node adoption. CPU core count, size, physical distribution and power density on the processor die could have great impact on thermal and computing performance. A thermal analysis is performed to understand these effects with the modeling assumptions: 60 mm × 60 mm flip chip lidded package, single die at size of 25 mm × 25 mm and total power dissipation of 300W. The thermal model including package and heat sink is set up to analyze variables such as core count, distribution and power level/density. To keep the processor temperature from exceeding the junction limit, dynamic voltage and frequency scaling (DVFS) is commonly used. A method to correlate thermal and computing performance based on DVFS, is also explored when junction temperature hits the limit. The impact of multi-core processor design on thermal performance is translated into the impact on computing performance under thermal constraints. Thermal guidance on multi-core processor die floor plan to optimize computing performance is provided.