Y. Taryana, Y. Sulaeman, Arief Budi Santiko, Y. Wahyu
{"title":"3.0 GHz低噪声放大器采用退化电感电路配置,适用于s波段雷达系统","authors":"Y. Taryana, Y. Sulaeman, Arief Budi Santiko, Y. Wahyu","doi":"10.1109/ICITISEE.2017.8285478","DOIUrl":null,"url":null,"abstract":"In this project, we designed a LNA which operates at frequency 3 GHz, related to this paper is applied on a radar system, is necessary to decrease the noise figure level on a component of the receiver, to avoid of self interference. The technique to decrease the noise figure level by using inductive degeneration, this technique is used to reduce the noise figure of the LNA circuit by doing a combination capacitor and inductor on DC biasing stage. The Agilent's Advanced Design System (ADS) 2011.10 electronic simulator was used during the design process. For the active component we used Pseudomorphic High Electron Mobility Transistor (PHEMT) ATF-36163. The parameters that need to be considered in the design of LNA are gain, noise, input and output matching impedance, stability, and the DC biasing. The VSWR of the devices in simulation result show a good result is less than 2. Specifications intended for the fabricated design of this LNA is: noise figure less than 2 dB and gain more than 10 dB.","PeriodicalId":130873,"journal":{"name":"2017 2nd International conferences on Information Technology, Information Systems and Electrical Engineering (ICITISEE)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"3.0 GHz low noise amplifier using degenerativeinductor circuit configuration applicable for S-Band radar system\",\"authors\":\"Y. Taryana, Y. Sulaeman, Arief Budi Santiko, Y. Wahyu\",\"doi\":\"10.1109/ICITISEE.2017.8285478\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this project, we designed a LNA which operates at frequency 3 GHz, related to this paper is applied on a radar system, is necessary to decrease the noise figure level on a component of the receiver, to avoid of self interference. The technique to decrease the noise figure level by using inductive degeneration, this technique is used to reduce the noise figure of the LNA circuit by doing a combination capacitor and inductor on DC biasing stage. The Agilent's Advanced Design System (ADS) 2011.10 electronic simulator was used during the design process. For the active component we used Pseudomorphic High Electron Mobility Transistor (PHEMT) ATF-36163. The parameters that need to be considered in the design of LNA are gain, noise, input and output matching impedance, stability, and the DC biasing. The VSWR of the devices in simulation result show a good result is less than 2. Specifications intended for the fabricated design of this LNA is: noise figure less than 2 dB and gain more than 10 dB.\",\"PeriodicalId\":130873,\"journal\":{\"name\":\"2017 2nd International conferences on Information Technology, Information Systems and Electrical Engineering (ICITISEE)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 2nd International conferences on Information Technology, Information Systems and Electrical Engineering (ICITISEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICITISEE.2017.8285478\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 2nd International conferences on Information Technology, Information Systems and Electrical Engineering (ICITISEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICITISEE.2017.8285478","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3.0 GHz low noise amplifier using degenerativeinductor circuit configuration applicable for S-Band radar system
In this project, we designed a LNA which operates at frequency 3 GHz, related to this paper is applied on a radar system, is necessary to decrease the noise figure level on a component of the receiver, to avoid of self interference. The technique to decrease the noise figure level by using inductive degeneration, this technique is used to reduce the noise figure of the LNA circuit by doing a combination capacitor and inductor on DC biasing stage. The Agilent's Advanced Design System (ADS) 2011.10 electronic simulator was used during the design process. For the active component we used Pseudomorphic High Electron Mobility Transistor (PHEMT) ATF-36163. The parameters that need to be considered in the design of LNA are gain, noise, input and output matching impedance, stability, and the DC biasing. The VSWR of the devices in simulation result show a good result is less than 2. Specifications intended for the fabricated design of this LNA is: noise figure less than 2 dB and gain more than 10 dB.