{"title":"一种基于smt的LFSR重播新技术","authors":"S. Prabhu, M. Hsiao, L. Lingappan, V. Gangaram","doi":"10.1109/VLSID.2012.103","DOIUrl":null,"url":null,"abstract":"In order for logic built-in-self-test (LBIST) to achieve coverages comparable with deterministic tests, multiple (and frequently many) seeds are often needed. Unlike previous methods that attempt to chain/compact the number of seeds, we present a novel Satisfiability Modulo Theory (SMT) based technique that can reduce the number of seeds significantly while simultaneously achieving high coverage for LBIST. In this technique we integrate the process of deterministic test generation and seed generation in one SMT process to eliminate the problems of chaining the separately generated deterministic patterns. Experimental results show the promise of the approach.","PeriodicalId":405021,"journal":{"name":"2012 25th International Conference on VLSI Design","volume":"92 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A Novel SMT-Based Technique for LFSR Reseeding\",\"authors\":\"S. Prabhu, M. Hsiao, L. Lingappan, V. Gangaram\",\"doi\":\"10.1109/VLSID.2012.103\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order for logic built-in-self-test (LBIST) to achieve coverages comparable with deterministic tests, multiple (and frequently many) seeds are often needed. Unlike previous methods that attempt to chain/compact the number of seeds, we present a novel Satisfiability Modulo Theory (SMT) based technique that can reduce the number of seeds significantly while simultaneously achieving high coverage for LBIST. In this technique we integrate the process of deterministic test generation and seed generation in one SMT process to eliminate the problems of chaining the separately generated deterministic patterns. Experimental results show the promise of the approach.\",\"PeriodicalId\":405021,\"journal\":{\"name\":\"2012 25th International Conference on VLSI Design\",\"volume\":\"92 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-01-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 25th International Conference on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSID.2012.103\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 25th International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2012.103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In order for logic built-in-self-test (LBIST) to achieve coverages comparable with deterministic tests, multiple (and frequently many) seeds are often needed. Unlike previous methods that attempt to chain/compact the number of seeds, we present a novel Satisfiability Modulo Theory (SMT) based technique that can reduce the number of seeds significantly while simultaneously achieving high coverage for LBIST. In this technique we integrate the process of deterministic test generation and seed generation in one SMT process to eliminate the problems of chaining the separately generated deterministic patterns. Experimental results show the promise of the approach.