用于高精度全差分开关电容读出电路的多相时钟发生器

X. Lai, Kaipei Zhang, Chen Liu, Yuheng Wang, Longjie Zhong, Jiangtao Wang, Qiang Ye, Dejun Ma
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引用次数: 1

摘要

提出了一种应用于微机电系统(MEMS)差动传感器的高精度全差分开关电容读出电路的无重叠时钟(NVC)发生器。与传统的产生一组不重叠时钟的电路相比,该电路产生一组新的时钟,这些时钟嵌套在原有的不重叠时钟中,并由这些时钟驱动。减小了电荷注入对读数的影响,提高了读数的精度。对于更复杂的开关电容电路,只有通过逻辑组合才能实现功能扩展。该发生器在SPICE的商业180nm CMOS工艺中进行了模拟。仿真结果表明,SC电路的精度提高了8.5%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A multi-phase clock generator for high accuracy fully differential switched capacitor readout circuit
In this paper, a non-overlap clock (NVC) generator for high accuracy fully differential Switched Capacitor (SC) readout circuit which is applied in Micro-Electro Mechanical System (MEMS) differential sensor is proposed. Compared with traditional generator, generating a set of non-overlap clock, this circuit generates a new set of clocks which are being nested inside the primary non-overlap clocks, and is driven by these clocks. The influence of charge injection of readout is reduced and thus its accuracy is improved. For more complex switched capacitor circuits, functional extension can be achieved only with logical combination. This generator is stimulated in a commercial 180nm CMOS process in SPICE. The simulation results show that accuracy of SC circuit is increased by 8.5%.
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