动态可重构实时音频处理系统的体系结构

F. Bruschi, V. Rana, D. Sciuto
{"title":"动态可重构实时音频处理系统的体系结构","authors":"F. Bruschi, V. Rana, D. Sciuto","doi":"10.1109/ESTMED.2008.4697001","DOIUrl":null,"url":null,"abstract":"In this paper we present an FPGA-based reconfigurable architecture for real time elaboration of audio streams. The architecure allows to dynamically define chains of cascading filters through which sound streams can be elaborated. Since the architecture requires only one-dimensional device reconfigurability, it can be implemented even on low cost devices, such as Xilinx Spartan3. Moreover, prior to reconfiguring a filter, sound is rerouted in order to avoid stream interruptions. This makes the architecture particularly suited for real time elaboration, for instance in the field of live music performances, for adaptive filtering or for professional digital recording systems. We show the implementation of the proposed architecture on a Xilinx Virtex4 [1], [2] based board, and present an example based on a set of filters that are loaded in series in the chain.","PeriodicalId":165969,"journal":{"name":"2008 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An architecture for dynamically reconfigurable real time audio processing systems\",\"authors\":\"F. Bruschi, V. Rana, D. Sciuto\",\"doi\":\"10.1109/ESTMED.2008.4697001\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present an FPGA-based reconfigurable architecture for real time elaboration of audio streams. The architecure allows to dynamically define chains of cascading filters through which sound streams can be elaborated. Since the architecture requires only one-dimensional device reconfigurability, it can be implemented even on low cost devices, such as Xilinx Spartan3. Moreover, prior to reconfiguring a filter, sound is rerouted in order to avoid stream interruptions. This makes the architecture particularly suited for real time elaboration, for instance in the field of live music performances, for adaptive filtering or for professional digital recording systems. We show the implementation of the proposed architecture on a Xilinx Virtex4 [1], [2] based board, and present an example based on a set of filters that are loaded in series in the chain.\",\"PeriodicalId\":165969,\"journal\":{\"name\":\"2008 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESTMED.2008.4697001\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTMED.2008.4697001","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种基于fpga的音频流实时细化的可重构结构。该体系结构允许动态定义级联过滤器链,通过它可以详细阐述声音流。由于该体系结构只需要一维设备可重构性,因此它甚至可以在低成本设备上实现,例如Xilinx Spartan3。此外,在重新配置过滤器之前,为了避免流中断,声音被重新路由。这使得该架构特别适合实时细化,例如在现场音乐表演领域,用于自适应滤波或专业数字录音系统。我们展示了在基于Xilinx Virtex4[1]和[2]的电路板上实现所提出的架构,并给出了一个基于一组在链中串联加载的滤波器的示例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An architecture for dynamically reconfigurable real time audio processing systems
In this paper we present an FPGA-based reconfigurable architecture for real time elaboration of audio streams. The architecure allows to dynamically define chains of cascading filters through which sound streams can be elaborated. Since the architecture requires only one-dimensional device reconfigurability, it can be implemented even on low cost devices, such as Xilinx Spartan3. Moreover, prior to reconfiguring a filter, sound is rerouted in order to avoid stream interruptions. This makes the architecture particularly suited for real time elaboration, for instance in the field of live music performances, for adaptive filtering or for professional digital recording systems. We show the implementation of the proposed architecture on a Xilinx Virtex4 [1], [2] based board, and present an example based on a set of filters that are loaded in series in the chain.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信