{"title":"基于字节并行可配置循环移位的面向5g的LDPC编码器","authors":"Yisong Sun, Huang-Babg Li, Chen Guo, Donglin Wang","doi":"10.1109/ICCSN52437.2021.9463607","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a Byte-Parallel Configurable Cyclic Shift (BP-CCS) algorithm, which converts the cyclic shift into a byte-parallel form. This method alleviates the low efficiency of cyclic shift calculation in Low Density Parity Check (LDPC) encoding under the 5G protocol effectively. Besides, we also expand the instruction set of self-developed DSP Universal Communication Processor (UCP) to cope with the hardware implementation bottleneck of BP-CCS algorithm. This allows the implementation of a BP-CCS-based LDPC encoder on UCP, which has been verified on the taped-out chip. Experimental results show that the time consumed by the BP-CCS-based LDPC encoder is about 1/50 of the time specified in 5G communication protocol standard, and the encoder architecture can be easily reconstructed in real time through parameter configuration.","PeriodicalId":263568,"journal":{"name":"2021 13th International Conference on Communication Software and Networks (ICCSN)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 5G-Oriented LDPC Encoder Based on Byte-Parallel Configurable Cyclic Shift\",\"authors\":\"Yisong Sun, Huang-Babg Li, Chen Guo, Donglin Wang\",\"doi\":\"10.1109/ICCSN52437.2021.9463607\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a Byte-Parallel Configurable Cyclic Shift (BP-CCS) algorithm, which converts the cyclic shift into a byte-parallel form. This method alleviates the low efficiency of cyclic shift calculation in Low Density Parity Check (LDPC) encoding under the 5G protocol effectively. Besides, we also expand the instruction set of self-developed DSP Universal Communication Processor (UCP) to cope with the hardware implementation bottleneck of BP-CCS algorithm. This allows the implementation of a BP-CCS-based LDPC encoder on UCP, which has been verified on the taped-out chip. Experimental results show that the time consumed by the BP-CCS-based LDPC encoder is about 1/50 of the time specified in 5G communication protocol standard, and the encoder architecture can be easily reconstructed in real time through parameter configuration.\",\"PeriodicalId\":263568,\"journal\":{\"name\":\"2021 13th International Conference on Communication Software and Networks (ICCSN)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 13th International Conference on Communication Software and Networks (ICCSN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCSN52437.2021.9463607\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 13th International Conference on Communication Software and Networks (ICCSN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCSN52437.2021.9463607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 5G-Oriented LDPC Encoder Based on Byte-Parallel Configurable Cyclic Shift
In this paper, we propose a Byte-Parallel Configurable Cyclic Shift (BP-CCS) algorithm, which converts the cyclic shift into a byte-parallel form. This method alleviates the low efficiency of cyclic shift calculation in Low Density Parity Check (LDPC) encoding under the 5G protocol effectively. Besides, we also expand the instruction set of self-developed DSP Universal Communication Processor (UCP) to cope with the hardware implementation bottleneck of BP-CCS algorithm. This allows the implementation of a BP-CCS-based LDPC encoder on UCP, which has been verified on the taped-out chip. Experimental results show that the time consumed by the BP-CCS-based LDPC encoder is about 1/50 of the time specified in 5G communication protocol standard, and the encoder architecture can be easily reconstructed in real time through parameter configuration.